Displaying 9 results from an estimated 9 matches for "instri".
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2019 Jun 26
2
How to handle ISD::STORE when both operands are FrameIndex?
...ressSpace() == 1;
}]>;
class StoreFrag<SDPatternOperator op> : PatFrag <
(ops node:$value, node:$ptr), (op node:$value, node:$ptr)
>;
class StackStore <SDPatternOperator op> : StoreFrag <op>, StackAddress;
def store_stack : StackStore<store>;
def StoreStackF : InstRI<2, (outs), (ins IntRegs:$reg, i32imm:$i),
"storestackf $reg, [$i]", [(store_stack i32:$reg,
AddrFI:$i)]>;
I'm puzzled why despite having "IntRegs:$reg" in ins list, it still matches
FrameIndex:
SEL: Starting selection on root node: t14: ch = store...
2016 Feb 04
2
New register class and patterns
...d.
def SDT_EscalaSetFlag : SDTypeProfile<0, 3, [SDTCisSameAs<0, 1>]>;
def Esenciasetflag : SDNode<"EsenciaISD::SET_FLAG", SDT_EsenciaSetFlag,
[SDNPOutGlue]>;
class SF_RI<bits<5> op2Val, string asmstr, PatLeaf Cond>
: InstRI<0xf, (outs), (ins GPR:$rA, s16imm:$imm),
!strconcat(asmstr, "i\t$rA, $imm"),
[(Escalasetflag (i32 GPR:$rA), immSExt16:$imm, Cond)]> {
bits<5> op2;
bits<5> rA;
bits<16> imm;
let Inst{25-21} = op2;
let Inst{20-16} = rA;
let Inst{15-...
2016 Feb 19
3
Failure to match a DAG after a minor pattern change in a custom Target
...SDNode<"EsenciaISD::SET_FLAG", SDT_EsenciaSetFlag,
[SDNPOutGlue]>;
def Esencia_CC_LT : PatLeaf<(imm),
[{return (N->getZExtValue() == ISD::SETLT);}]>;
class SF_RI<bits<5> op2Val, string asmstr, PatLeaf Cond>
: InstRI<0xf, (outs), (ins GPR:$rA, s16imm:$imm),
!strconcat(asmstr, "i\t$rA, $imm"),
[(Esenciasetflag (i32 GPR:$rA), immSExt16:$imm, Cond)]> {
bits<5> op2;
bits<5> rA;
bits<16> imm;
let Inst{25-21} = op2;
let Inst{20-16} = rA;
let Inst{15...
2016 Jan 29
2
New register class and patterns
I've added a new register class to my target, but haven't used any of the
new registers in any of the instructions. However when I compile llvm I get
the following error:
In SFEQ_ri: Could not infer all types in pattern
Curiously all the instructions where this error occurs are the set flag
instructions (flags like zero, less than, greater than etc).
Would anyone be able to figure out
2016 Feb 04
2
New register class and patterns
...: SDNode<"EscalaISD::SET_FLAG", SDT_EscalaSetFlag,
[SDNPOutGlue]>;
def Escala_CC_EQ : PatLeaf<(imm),
[{return (N->getZExtValue() == ISD::SETEQ);}]>;
class SF_RI<bits<5> op2Val, string asmstr, PatLeaf Cond>
: InstRI<0xf, (outs), (ins GPR:$rA, s16imm:$imm),
!strconcat(asmstr, "i\t$rA, $imm"),
[(Escalasetflag (i32 GPR:$rA), immSExt16:$imm, Cond)]> {
bits<5> op2;
bits<5> rA;
bits<16> imm;
let Inst{25-21} = op2;
let Inst{20-16} = rA;
let Inst{15-...
2016 Feb 03
2
New register class and patterns
On Tue, Feb 2, 2016 at 8:42 PM, Matt Arsenault <arsenm2 at gmail.com> wrote:
>
> On Feb 2, 2016, at 16:52, Rail Shafigulin <rail at esenciatech.com> wrote:
>
> def SDT_EscalaSetFlag : SDTypeProfile<0, 3, [SDTCisSameAs<0, 1>]>;
>
>
> I think for setting an implicit register, you still need to have 1 result
> here.
>
> If you look at
2019 Jun 26
2
How to handle ISD::STORE when both operands are FrameIndex?
On Wed, Jun 26, 2019 at 12:38 PM Tim Northover <t.p.northover at gmail.com>
wrote:
> Hi Gleb,
>
> On Wed, 26 Jun 2019 at 07:28, Gleb Popov <6yearold at gmail.com> wrote:
> > def StoreStackF : InstRI<2, (outs), (ins IntRegs:$reg, i32imm:$i),
> > "storestackf $reg, [$i]", [(store_stack i32:$reg,
> AddrFI:$i)]>;
> >
> > I'm puzzled why despite having "IntRegs:$reg" in ins list, it still
> matches FrameIndex:
>
> A reg...
2016 Jan 29
3
New register class and patterns
...[(Escalasetflag (i32 GPR:$rA), (i32 GPR:$rB), Cond)]> {
bits<5> op2;
bits<5> rA;
bits<5> rB;
let Inst{25-21} = op2;
let Inst{20-16} = rA;
let Inst{15-11} = rB;
let op2 = op2Val;
}
class SF_RI<bits<5> op2Val, string asmstr, PatLeaf Cond>
: InstRI<0xf, (outs), (ins GPR:$rA, s16imm:$imm),
!strconcat(asmstr, "i\t$rA, $imm"),
[(Escalasetflag (i32 GPR:$rA), immSExt16:$imm, Cond)]> {
bits<5> op2;
bits<5> rA;
bits<16> imm;
let Inst{25-21} = op2;
let Inst{20-16} = rA;
let Inst{15-...
2019 Jun 25
2
How to handle ISD::STORE when both operands are FrameIndex?
On Mon, Jun 24, 2019 at 4:08 PM Tim Northover <t.p.northover at gmail.com>
wrote:
> On Mon, 24 Jun 2019 at 12:16, Gleb Popov via llvm-dev
> <llvm-dev at lists.llvm.org> wrote:
> > 1. Where does it come from? Can I do anything to make it not appear?
>
> It comes from something like:
>
> %ptr = alloca i8
> %var = alloca i8*
> store i8* %ptr, i8**