search for: dsb

...1 files changed, 2 insertions(+), 2 deletions(-) diff --git a/xen/include/asm-arm/flushtlb.h b/xen/include/asm-arm/flushtlb.h index 210abfa..5067e5d 100644 --- a/xen/include/asm-arm/flushtlb.h +++ b/xen/include/asm-arm/flushtlb.h @@ -19,7 +19,7 @@ static inline void flush_tlb_local(void) { dsb(); - WRITE_CP32((uint32_t) 0, TLBIALLIS); + WRITE_CP32((uint32_t) 0, TLBIALL); dsb(); isb(); @@ -30,7 +30,7 @@ static inline void flush_tlb_all_local(void) { dsb(); - WRITE_CP32((uint32_t) 0, TLBIALLNSNHIS); + WRITE_CP32((uint32_t) 0, TLBIALLNSNH); dsb();...

..., r9-r11, lr} mov pc, lr -DECLARE_CPU_OP(cpu_flush_cache_all, v7_flush_cache_all) - -PRIVATE(v7_flush_cache_range) +ENTRY(cpu_flush_cache_range) mrc p15, 1, r3, c0, c0, 0 @ read CSIDR and r3, r3, #7 @ cache line size encoding mov r3, #16 @ size offset @@ -74,9 +71,7 @@ 1: dsb mov pc, lr -DECLARE_CPU_OP(cpu_flush_cache_range, v7_flush_cache_range) - -PRIVATE(v7_clean_cache_range) +ENTRY(cpu_clean_cache_range) mrc p15, 1, r3, c0, c0, 0 @ read CSIDR and r3, r3, #7 @ cache line size encoding mov r3, #16 @ size offset @@ -90,5 +85,3 @@ 1: dsb mov...

Can someone explain Jeff's hack, I really want to play BF1942 with sound fixed,especially with kdog's comment 15. Thanks http://bugs.winehq.org/show_bug.cgi?id=11499#c15 Thank You, so far both Fedora and Ubuntu forums are mute

Dear all, Jo?o from Brazil kindly informed me that there was a typo in my previous message... Please find corrected message below : I am looking for a VMWare, Free/Open BSD, Redhat & SQL Project Manager. Does anyone know of a suitable individual? UK Based (Berkshire) so Ideally an EU candidate. 3-6 mth contract paying ?350/400 per day going to permanent role @ Circa

Hi @all, I have many domU on my server and they work fine, some of them have their own NICs with the PCI param in the config. Now I try to bring a soundcard for asterisk into a new domU and have the following trouble: rz3-ta:~ # lspci 00:00.0 Multimedia audio controller: Creative Labs SB Audigy (rev 04) PCI: Enabling device 0000:00:00.0 (0000 -> 0001) EMU10K1_Audigy: probe of 0000:00:00.0

First off, Apologies for the massive patch series... This series boots a 32-bit dom0 kernel to a command prompt on an ARMv8 (AArch64) model. The kernel is the same one as I am currently using with the 32 bit hypervisor I haven''t yet tried starting a guest or anything super advanced like that ;-). Also there is not real support for 64-bit domains at all, although in one or two places I

...tion function for each set of parameter values. I am having trouble getting the apply() function to work. Here is an example. Consider an epidemiology model of West Nile Virus: wnv.model <- function(Time, State, Pars){ with(as.list(c(State, Pars)), { dSB <- -(alphaB*betaB*SB*IM)/(SB + IB) dIB <- (alphaB*betaB*SB*IM)/(SB + IB) - deltaB*IB dSM <- bM*(SM + EM + IM) - (alphaM*betaB*IB*SM)/(SB + IB) - dM*SM dEM <- (alphaM*betaB*SM*IB)/(SB + IB) - kappaM*EM - dM*EM...

This round implements all of the review comments from V2 and all patches are now acked. Unless there are any objections I intend to apply later this morning. Ian.

...netbios name = SOGO server role = active directory domain controller dns forwarder = 192.168.121.1 idmap_ldb:use rfc2307 = yes passdb backend = samba allow dns updates = nonsecure ### Configuration required by OpenChange server ### dsb:schema update allowed = true #dcerpc endpoint servers = +mapiproxy #dcerpc endpoint servers = +epmapper, +mapiproxy #dcerpc_mapiproxy:server = true #dcerpc_mapiproxy:interfaces = exchange_emsmdb, exchange_nsp, exchange_ds_rfr ### Configuration required...

This patch series implements SMP boot for arch/arm, as far as getting all CPUs up and running the idle loop. Changes from v1: - moved barriers out of loop in udelay() - dropped broken GIC change in favour of explanatory comment - made the increment of ready_cpus atomic (I couldn''t move the increment to before signalling the next CPU because the PT switch has to happen between

Running "syslinux -s /dev/dsb" during installation of Slackware64-14.1 (to make a bootable USB stick) fails like this: Error converting to codepage 850 Invalid argument Cannot initialize 'S:' Bad target s:/ldlinux.sys syslinux: failed to create ldlinux.sys But running the same command in the installed system suc...

Hi all, I'm currently working on implementing ACLE extensions for ARM. There are some memory barrier intrinsics, i.e.__dsb and __isb that require the compiler not to reorder instructions around their corresponding built-in intrinsics(__builtin_arm_dsb, __builtin_arm_isb), including non-memory-access instructions.[1] This is currently not possible. It is sometimes useful to prevent the compiler from reordering memory-a...

On 24 June 2014 01:55, Philip Reames <listmail at philipreames.com> wrote: > > On 06/19/2014 09:35 AM, Yi Kong wrote: >> >> Hi all, >> >> I'm currently working on implementing ACLE extensions for ARM. There >> are some memory barrier intrinsics, i.e.__dsb and __isb that require >> the compiler not to reorder instructions around their corresponding >> built-in intrinsics(__builtin_arm_dsb, __builtin_arm_isb), including >> non-memory-access instructions.[1] This is currently not possible. >> >> It is sometimes useful to p...

Hello, I''ve installed xen3 and asked myself whats better, image files or partions? I will prefer image files because of the flexible handling, but I''ve heard that real partions are faster. Thanks a lot for any hints? Daniel _______________________________________________ Xen-users mailing list Xen-users@lists.xensource.com http://lists.xensource.com/xen-users

...purposes of weak barriers they should be, and they are only slightly stronger than SMP in one case so odds are strength will not be the issue. As far as speed I would suspect that the difference between inner and outer shareable domain should be negligible compared to the difference between a dsb() and a dmb(). - Alex

...purposes of weak barriers they should be, and they are only slightly stronger than SMP in one case so odds are strength will not be the issue. As far as speed I would suspect that the difference between inner and outer shareable domain should be negligible compared to the difference between a dsb() and a dmb(). - Alex

...4,ifelse(df$Age>=54,54,ifelse(df$Age>=44,44,ifelse(df$Age>=34,34,ifelse(df$Age>=29,29,ifelse(df$Age>=24,24,ifelse(df$Age>=19,19,17)))))))))))) # Reference the lookup table based on computed indices df$DSTz <-DSTzlook[which(DSTzlook[,1]==df$Agetmp),which(DSTzlook[1,]==df$DSF+df$DSB)] # Cleanup #rm(df) #df$Agetmp<-NULL -- View this message in context: http://r.789695.n4.nabble.com/set-dataframe-field-value-from-lookup-table-tp3080245p3080245.html Sent from the R help mailing list archive at Nabble.com.

...hat will provide performance improvements and performance stability. This feature will not affect other architectures. It will, however, set up an infrastructure for other architectures to do the same, if ever needed. Here are some examples for cases in which nops can improve performance: 1. DSB (Decoded Stream Buffer) Thrashing. DSB is a cache for uops that have been decoded. It is limited to 3 ways per 32B window; 4 or more ways will cause a performance degradation. This can be avoided by aligning with nops. See Zia Ansari's presentation for more information: http://schd.ws/hosted_f...

...server role = active directory domain controller > dns forwarder = 192.168.121.1 > idmap_ldb:use rfc2307 = yes > passdb backend = samba > allow dns updates = nonsecure > > ### Configuration required by OpenChange server ### > dsb:schema update allowed = true > #dcerpc endpoint servers = +mapiproxy > #dcerpc endpoint servers = +epmapper, +mapiproxy > #dcerpc_mapiproxy:server = true > #dcerpc_mapiproxy:interfaces = exchange_emsmdb, exchange_nsp, > exchange_ds_rfr > ##...

...hat will provide performance improvements and performance stability. This feature will not affect other architectures. It will, however, set up an infrastructure for other architectures to do the same, if ever needed. Here are some examples for cases in which nops can improve performance: 1. DSB (Decoded Stream Buffer) Thrashing. DSB is a cache for uops that have been decoded. It is limited to 3 ways per 32B window; 4 or more ways will cause a performance degradation. This can be avoided by aligning with nops. See Zia Ansari's presentation for more information: http://schd.ws/hosted_f...