search for: cntx

...4 CPU 3.00GHz (3000.12-MHz 686-class CPU) Origin = "GenuineIntel" Id = 0xf34 Stepping = 4 Features=0xbfebfbff<FPU,VME,DE,PSE,TSC,MSR,PAE,MCE,CX8,APIC,SEP,MTRR,PGE,MCA,C MOV,PAT,PSE36,CLFLUSH,DTS,ACPI,MMX,FXSR,SSE,SSE2,SS,HTT,TM,PBE> Features2=0x441d<SSE3,RSVD2,MON,DS_CPL,CNTX-ID,<b14>> Looks like 1, 2, _and_ 3 are supported. <b14> is xTPR (Send Task Priority Messages) --Emil

...000.12-MHz 686-class CPU) > Origin = "GenuineIntel" Id = 0xf34 Stepping = 4 > Features=0xbfebfbff<FPU,VME,DE,PSE,TSC,MSR,PAE,MCE,CX8,APIC,SEP,MTRR,PGE,MCA,C > MOV,PAT,PSE36,CLFLUSH,DTS,ACPI,MMX,FXSR,SSE,SSE2,SS,HTT,TM,PBE> > Features2=0x441d<SSE3,RSVD2,MON,DS_CPL,CNTX-ID,<b14>> > > Looks like 1, 2, _and_ 3 are supported. > <b14> is xTPR (Send Task Priority Messages) Okay, this is probably some stack alignment issue or something. Can you please file a bug? This is not a 2.0 blocker, but we want to track it. Thanks! -Chris -- http:/...

> On Tue, May 15, 2007 at 01:23:32AM -0700, Tanya M. Lattner wrote: >> 4) Compile llvm-gcc4 and llvm from source. Run 'make check' and do a 'make >> ENABLE_OPTIMIZED=1 TEST=nightly report' in llvm-test. >> >> It would also be helpful for someone to compile/test with objdir != srcdir. > > This is on FreeBSD 6.2-RELEASE, on i386. > Both llvm and

...0001] Set("SIP/20321-00000002", "LOCAL(ext)=20545") in new stack -- Executing [20545 at default:50002] Set("SIP/20321-00000002", "LOCAL(dev)=SIP/20545") in new stack -- Executing [20545 at default:50003] Set("SIP/20321-00000002", "LOCAL(cntx)=") in new stack -- Executing [20545 at default:50004] Set("SIP/20321-00000002", "LOCAL(mbx)=20545") in new stack -- Executing [20545 at default:50005] Dial("SIP/20321-00000002", "SIP/20545,20") in new stack [Oct 23 11:03:34] WARNING[8839][C-0000...

...3.00GHz (2992.71-MHz K8-class CPU) Origin = "GenuineIntel" Id = 0xf43 Stepping = 3 Features=0xbfebfbff<FPU,VME,DE,PSE,TSC,MSR,PAE,MCE,CX8,APIC,SEP,MTRR,PGE ,MCA,C MOV,PAT,PSE36,CLFLUSH,DTS,ACPI,MMX,FXSR,SSE,SSE2,SS,HTT,TM,PBE> Features2=0x641d<SSE3,RSVD2,MON,DS_CPL,CNTX-ID,CX16,<b14>> AMD Features=0x20100800<SYSCALL,NX,LM> Logical CPUs per core: 2 Anyone have any ideas? The system is AMD64 FreeBSD 6.1-RELEASE-p1.

...); } -__inline static void _cancel_timer(_timer *ptimer, u8 *bcancelled) +static inline void _cancel_timer(_timer *ptimer, u8 *bcancelled) { del_timer_sync(ptimer); *bcancelled = true;/* true == 1; false == 0 */ } -__inline static void _init_workitem(_workitem *pwork, void *pfunc, void *cntx) +static inline void _init_workitem(_workitem *pwork, void *pfunc, void *cntx) { INIT_WORK(pwork, pfunc); } -__inline static void _set_workitem(_workitem *pwork) +static inline void _set_workitem(_workitem *pwork) { schedule_work(pwork); } -__inline static void _cancel_workitem_sync(_wo...

...e to work. There'd be other implementation work needed to make it actually useful, the validity based on dominance model used by assumes seems like an obvious candidate. Thinking through this, I see a couple of places that we'd change: - isLocationKnownInvariant(Value* Loc, Instruction* Cntx) and related analysis pass (analogous to assumptions) - The new "no end" version is easy (dominance) - The older version is a graph walk looking paths which include either an end, or call. - eagerly propagate known invariant location store values in EarlyCSE (strictly by dominanc...

On Tue, 2018-06-05 at 10:05 -0700, Nick Desaulniers wrote: > Functions marked extern inline do not emit an externally visible > function when the gnu89 C standard is used. Some KBUILD Makefiles > overwrite KBUILD_CFLAGS. This is an issue for GCC 5.1+ users as without > an explicit C standard specified, the default is gnu11. Since c99, the > semantics of extern inline have changed

On Tue, 2018-06-05 at 10:05 -0700, Nick Desaulniers wrote: > Functions marked extern inline do not emit an externally visible > function when the gnu89 C standard is used. Some KBUILD Makefiles > overwrite KBUILD_CFLAGS. This is an issue for GCC 5.1+ users as without > an explicit C standard specified, the default is gnu11. Since c99, the > semantics of extern inline have changed

...M) CPU 2.80GHz (2822.51-MHz 686-class CPU) Origin = "GenuineIntel" Id = 0xf41 Stepping = 1 Features=0xbfebfbff<FPU,VME,DE,PSE,TSC,MSR,PAE,MCE,CX8,APIC,SEP,MTRR,PGE,MCA,CMOV,PAT,PSE36,CLFLUSH,DTS,ACPI,MMX,FXSR,SSE ,SSE2,SS,HTT,TM,PBE> Features2=0x641d<SSE3,RSVD2,MON,DS_CPL,CNTX-ID,CX16,<b14>> AMD Features=0x20100000<NX,LM> Hyperthreading: 2 logical CPUs real memory = 1073152000 (1023 MB) avail memory = 1041223680 (992 MB) npx0: [FAST] npx0: <math processor> on motherboard npx0: INT 16 interface cpu0 on motherboard pcib0: <Host to PCI bridge&gt...

...PU 3.00GHz (3006.01-MHz 686-class CPU) Origin = "GenuineIntel" Id = 0xf4a Stepping = 10 Features=0xbfebfbff<FPU,VME,DE,PSE,TSC,MSR,PAE,MCE,CX8,APIC,SEP,MTRR,PGE,MCA,CMOV,PAT,PSE36,CLFLUSH,DTS,ACPI,MMX,FXSR,SSE,SSE2,SS,HTT,TM,PBE> Features2=0x649d<SSE3,RSVD2,MON,DS_CPL,EST,CNTX-ID,CX16,<b14>> AMD Features=0x20100000<NX,LM> AMD Features2=0x1<LAHF> Logical CPUs per core: 2 real memory = 2137440256 (2038 MB) avail memory = 2086498304 (1989 MB) ACPI APIC Table: <INTEL D945GTP > FreeBSD/SMP: Multiprocessor System Detected: 2 CPUs cpu0 (BSP):...

Hi, I have strange problem when booting FreeBSD-6.x in HP Proliant ML370 G4. The problem is "-" appears on the screen and it never boots unless somebody hits the "Enter" key. Sometimes even PS2 keyboard doesn't respond during that time. Tried with USB keyboard, same problem. The machine has dual Xeon 3.2 GHz, 1GB of RAM and LSI Logic (mpt-5.0.5.20.00 bios) LSI1030-IT

I'm looking at how to optimize IR which contains reads from a field which is known to be initialized exactly once. I've got an idea on how to approach this, but wanted to see if others have alternate ideas or similar problems which might spark discussion. It feels like there's a potentially generally useful optimization hint here if we can generalize it sufficiently without

Thomas, Have spoken to Soren, from my bootlog he believes that the problem is in atapicam causing the system to lock up. He is happy to answer some questions but doesnt have time to delve into atapicam himself. Did you author atapicam, I have seen your name on the sourcecode, can you help me further? Whats next? Thanks Adam. -------------- next part -------------- An embedded message was