| Wednesday September 30 2020 |
| Time | Replies | Subject |
|---|
| 10:54PM |
1 |
[Release-testers] [11.0.0 Release] Release Candidate 5 is here |
| 8:31PM |
2 |
TableGen processing of target-specific intrinsics |
| 8:14PM |
0 |
[RFC] Backend for Motorola 6800 series CPU (M68k) |
| 8:08PM |
0 |
GC-parseable element atomic memcpy/memmove |
| 6:41PM |
0 |
[Release-testers] [11.0.0 Release] Release Candidate 5 is here |
| 6:41PM |
0 |
[RFC] Framework for Finding and Using Similarity at the IR Level |
| 6:30PM |
5 |
[Release-testers] [11.0.0 Release] Release Candidate 5 is here |
| 6:24PM |
0 |
[11.0.0 Release] Release Candidate 4 is here |
| 6:15PM |
0 |
[Release-testers] [11.0.0 Release] Release Candidate 5 is here |
| 6:07PM |
6 |
[11.0.0 Release] Release Candidate 5 is here |
| 6:01PM |
1 |
Relation between Register and MCRegister |
| 5:40PM |
0 |
ORC JIT - different behaviour of ExecutionSession.lookup? |
| 5:13PM |
0 |
Relation between Register and MCRegister |
| 4:16PM |
0 |
Cross-compiling only compiler-rt libraries |
| 3:30PM |
2 |
[RFC] Framework for Finding and Using Similarity at the IR Level |
| 2:47PM |
0 |
[RFC] Framework for Finding and Using Similarity at the IR Level |
| 1:20PM |
0 |
TableGen processing of target-specific intrinsics |
| 1:14PM |
0 |
lifetime_start/end |
| 12:33PM |
0 |
Disabling llvm-link struct type merging |
| 11:22AM |
2 |
[RFC] Framework for Finding and Using Similarity at the IR Level |
| 9:28AM |
2 |
lifetime_start/end |
| 9:15AM |
2 |
Cross-compiling only compiler-rt libraries |
| 9:09AM |
0 |
Creating a global variable for a struct array |
| 7:05AM |
2 |
ORC JIT - different behaviour of ExecutionSession.lookup? |
| 6:24AM |
0 |
Upcoming upgrade of LLVM buildbot |
| 4:11AM |
2 |
GC-parseable element atomic memcpy/memmove |
| 1:04AM |
2 |
Relation between Register and MCRegister |
| 12:47AM |
2 |
Creating a global variable for a struct array |
| 12:25AM |
2 |
OrcV1 removal |
| |
| Tuesday September 29 2020 |
| Time | Replies | Subject |
|---|
| 10:17PM |
0 |
[clang-tidy] where are "clang-diagnostic" checkers |
| 9:58PM |
1 |
binutils extensions: (1) dependency list in .a (2) SHF_GNU_RETAIN for GC roots in linking |
| 8:58PM |
0 |
OrcV1 removal |
| 7:22PM |
3 |
TableGen processing of target-specific intrinsics |
| 6:58PM |
3 |
OrcV1 removal |
| 6:36PM |
1 |
ORC JIT - different behaviour of ExecutionSession.lookup? |
| 6:24PM |
3 |
[RFC] Backend for Motorola 6800 series CPU (M68k) |
| 6:13PM |
0 |
Relation between Register and MCRegister |
| 6:09PM |
2 |
Relation between Register and MCRegister |
| 6:06PM |
0 |
clang_indexTranslationUnit and macro expansions |
| 6:02PM |
0 |
Relation between Register and MCRegister |
| 5:53PM |
0 |
[RFC] Backend for Motorola 6800 series CPU (M68k) |
| 5:49PM |
2 |
Relation between Register and MCRegister |
| 4:55PM |
0 |
ORC JIT - different behaviour of ExecutionSession.lookup? |
| 4:28PM |
0 |
Relation between Register and MCRegister |
| 4:12PM |
2 |
Relation between Register and MCRegister |
| 4:08PM |
0 |
Relation between Register and MCRegister |
| 2:38PM |
1 |
Fwd: restrict func param losing noalias when inlined |
| 2:33PM |
0 |
Fwd: restrict func param losing noalias when inlined |
| 2:32PM |
0 |
Fwd: restrict func param losing noalias when inlined |
| 12:37PM |
0 |
PSLP: Padded SLP Automatic Vectorization |
| 11:30AM |
2 |
[riscv] How do I use the RISC-V Vector extension instructions in LLVM IR? |
| 10:39AM |
1 |
Improved jump-threading in LLVM for finite state automata |
| 9:12AM |
2 |
[RFC] Backend for Motorola 6800 series CPU (M68k) |
| 8:22AM |
0 |
Improved jump-threading in LLVM for finite state automata |
| 7:03AM |
3 |
ORC JIT - different behaviour of ExecutionSession.lookup? |
| 2:33AM |
0 |
restrict func param losing noalias when inlined |
| 1:39AM |
5 |
restrict func param losing noalias when inlined |
| 1:37AM |
2 |
Improved jump-threading in LLVM for finite state automata |
| 12:50AM |
0 |
restrict func param losing noalias when inlined |
| 12:46AM |
2 |
Relation between Register and MCRegister |
| 12:00AM |
2 |
restrict func param losing noalias when inlined |
| |
| Monday September 28 2020 |
| Time | Replies | Subject |
|---|
| 11:46PM |
0 |
ORC JIT - different behaviour of ExecutionSession.lookup? |
| 9:58PM |
2 |
LLVM Developers Meeting JIT BoF -- Request for Topics of Interest |
| 9:53PM |
0 |
LLJIT vs. thread-local storage (again) |
| 9:28PM |
0 |
How to know if function has a body in a different module |
| 9:05PM |
0 |
LLVM Developers Meeting JIT BoF -- Request for Topics of Interest |
| 9:02PM |
2 |
LLJIT vs. thread-local storage (again) |
| 8:56PM |
2 |
LLVM Developers Meeting JIT BoF -- Request for Topics of Interest |
| 8:43PM |
0 |
LLJIT vs. thread-local storage (again) |
| 8:22PM |
3 |
LLVM Developers Meeting JIT BoF -- Request for Topics of Interest |
| 7:46PM |
2 |
preferred way to return expected values |
| 7:27PM |
4 |
[11.0.0 Release] Release Candidate 4 is here |
| 6:50PM |
0 |
LLVM Weekly - #352, September 28th 2020 |
| 6:13PM |
0 |
[RFC] Backend for Motorola 6800 series CPU (M68k) |
| 5:56PM |
0 |
preferred way to return expected values |
| 5:56PM |
0 |
GC-parseable element atomic memcpy/memmove |
| 4:58PM |
0 |
When are Doxygen pages built? |
| 3:27PM |
0 |
LLVM Dev Mtg - Registration closes Oct 1st! |
| 2:45PM |
2 |
PSLP: Padded SLP Automatic Vectorization |
| 2:35PM |
2 |
LLJIT vs. thread-local storage (again) |
| 2:18PM |
0 |
LLVM Developers Meeting JIT BoF -- Request for Topics of Interest |
| 12:30PM |
1 |
cuda __shfl_sync problem |
| 11:57AM |
2 |
ORC JIT - different behaviour of ExecutionSession.lookup? |
| 9:56AM |
3 |
[RFC] Backend for Motorola 6800 series CPU (M68k) |
| 9:38AM |
2 |
[RFC] Backend for Motorola 6800 series CPU (M68k) |
| 9:37AM |
0 |
[RFC] Backend for Motorola 6800 series CPU (M68k) |
| 9:25AM |
2 |
[RFC] Backend for Motorola 6800 series CPU (M68k) |
| 5:44AM |
0 |
[RFC] Backend for Motorola 6800 series CPU (M68k) |
| 3:29AM |
2 |
LLVM Developers Meeting JIT BoF -- Request for Topics of Interest |
| |
| Sunday September 27 2020 |
| Time | Replies | Subject |
|---|
| 7:27PM |
0 |
[RFC] Backend for Motorola 6800 series CPU (M68k) |
| 6:14PM |
1 |
Code size BoF @ Developers' Meeting |
| 11:52AM |
2 |
A 4x slower initialization loop in LLVM vs GCC and MSVC |
| 11:30AM |
0 |
[clang-tidy] where are "clang-diagnostic" checkers |
| 10:27AM |
4 |
[clang-tidy] where are "clang-diagnostic" checkers |
| 10:08AM |
1 |
[clang] What is the rationale behind locking the __int128 extension type behind a 64-bit pointer type? |
| 8:57AM |
0 |
How to add a new clang-tidy module |
| 8:39AM |
3 |
How to add a new clang-tidy module |
| |
| Saturday September 26 2020 |
| Time | Replies | Subject |
|---|
| 10:17PM |
2 |
preferred way to return expected values |
| 1:12PM |
1 |
TableGen pseudo lowering |
| 7:34AM |
0 |
TableGen pseudo lowering |
| 6:08AM |
0 |
Basic block cloning enhancement for Propeller |
| 4:49AM |
0 |
ORC JIT Weekly #22 -- Removable code overview |
| 3:44AM |
0 |
UNSUPPORTED: LLVM :: Bindings/Go/go.test while llvm-go is available |
| 2:19AM |
0 |
LLVM Developers Meeting JIT BoF -- Request for Topics of Interest |
| 2:05AM |
3 |
LLVM Developers Meeting JIT BoF -- Request for Topics of Interest |
| 12:20AM |
0 |
Why does a DISubprogram need to be distinct? |
| |
| Friday September 25 2020 |
| Time | Replies | Subject |
|---|
| 11:38PM |
0 |
OrcV1 removal |
| 11:36PM |
3 |
Why does a DISubprogram need to be distinct? |
| 11:29PM |
0 |
Unifying CMake variable names used in checks across subprojects |
| 11:07PM |
0 |
Why does a DISubprogram need to be distinct? |
| 10:32PM |
2 |
Why does a DISubprogram need to be distinct? |
| 10:01PM |
0 |
[cfe-dev] [RFC] Backend for Motorola 6800 series CPU (M68k) |
| 9:16PM |
1 |
[cfe-dev] [RFC] Backend for Motorola 6800 series CPU (M68k) |
| 8:03PM |
0 |
LLVM buildmaster will be updated and restarted tonight |
| 5:05PM |
2 |
[cfe-dev] [RFC] Backend for Motorola 6800 series CPU (M68k) |
| 4:46PM |
2 |
TableGen pseudo lowering |
| 3:05PM |
0 |
cuda __shfl_sync problem |
| 2:03PM |
2 |
Unifying CMake variable names used in checks across subprojects |
| 1:26PM |
0 |
nnan, ninf, and poison |
| 1:05PM |
0 |
Understanding tail call |
| 11:59AM |
1 |
(no subject) |
| 10:33AM |
2 |
Understanding tail call |
| 8:18AM |
2 |
cuda __shfl_sync problem |
| 4:41AM |
0 |
[cfe-dev] [RFC] Backend for Motorola 6800 series CPU (M68k) |
| 3:52AM |
0 |
Unifying CMake variable names used in checks across subprojects |
| |
| Thursday September 24 2020 |
| Time | Replies | Subject |
|---|
| 11:44PM |
0 |
[RFC] Backend for Motorola 6800 series CPU (M68k) |
| 11:34PM |
2 |
OrcV1 removal |
| 11:31PM |
7 |
[RFC] Backend for Motorola 6800 series CPU (M68k) |
| 11:29PM |
0 |
New TableGen documents |
| 11:29PM |
0 |
ORC JIT - Can modules independently managed with one LLJIT instance? + problems with ExecutionSession.lookup |
| 11:19PM |
0 |
nnan, ninf, and poison |
| 6:54PM |
0 |
cuda __shfl_sync problem |
| 6:17PM |
0 |
A question about conditional dependence between components in LLVMBuild.txt |
| 6:02PM |
2 |
cuda __shfl_sync problem |
| 4:57PM |
0 |
Why is this error in RuntimeDyldCOFFX86_64.h not fatal? |
| 3:20PM |
0 |
How lld invoke LTO or thinLTO and is there some cases and some method to get the step-by-step message for me to understand how LTO worked? |
| 2:43PM |
2 |
How lld invoke LTO or thinLTO and is there some cases and some method to get the step-by-step message for me to understand how LTO worked? |
| 10:44AM |
0 |
[lldb-dev] FW: Optimised-code debugging experience Round Table |
| 7:49AM |
0 |
(no subject) |
| 6:03AM |
2 |
ORC JIT - Can modules independently managed with one LLJIT instance? + problems with ExecutionSession.lookup |
| 12:52AM |
0 |
(no subject) |
| |
| Wednesday September 23 2020 |
| Time | Replies | Subject |
|---|
| 9:04PM |
1 |
MS assembly integer literal question |
| 8:03PM |
0 |
[libc-dev] How about add webassembly/wasi support in llvm-libc. |
| 7:49PM |
1 |
[libc-dev] How about add webassembly/wasi support in llvm-libc. |
| 7:47PM |
0 |
Improved jump-threading in LLVM for finite state automata |
| 7:45PM |
4 |
(no subject) |
| 7:18PM |
0 |
Enable compiler warnings |
| 7:13PM |
0 |
Improved jump-threading in LLVM for finite state automata |
| 7:04PM |
2 |
Enable compiler warnings |
| 7:03PM |
3 |
Improved jump-threading in LLVM for finite state automata |
| 7:03PM |
1 |
How about add webassembly/wasi support in llvm-libc. |
| 6:16PM |
0 |
Improved jump-threading in LLVM for finite state automata |
| 5:46PM |
0 |
How about add webassembly/wasi support in llvm-libc. |
| 4:55PM |
1 |
Incorrect Cortex-R4/R4F/R5 ProcessorModel in ARM.td |
| 4:44PM |
3 |
How about add webassembly/wasi support in llvm-libc. |
| 4:24PM |
1 |
Incorrect Cortex-R4/R4F/R5 ProcessorModel in ARM.td |
| 4:15PM |
0 |
ORC JIT - Can modules independently managed with one LLJIT instance? + problems with ExecutionSession.lookup |
| 4:06PM |
0 |
Incorrect Cortex-R4/R4F/R5 ProcessorModel in ARM.td |
| 3:11PM |
1 |
Vectorization of math function failed? |
| 2:33PM |
4 |
Improved jump-threading in LLVM for finite state automata |
| 2:27PM |
2 |
Incorrect Cortex-R4/R4F/R5 ProcessorModel in ARM.td |
| 2:20PM |
3 |
Optimised-code debugging experience Round Table |
| 10:27AM |
2 |
Information about the number of indices in memory accesses |
| 8:04AM |
0 |
Creating a global variable for a struct array |
| 8:02AM |
2 |
ORC JIT - Can modules independently managed with one LLJIT instance? + problems with ExecutionSession.lookup |
| |
| Tuesday September 22 2020 |
| Time | Replies | Subject |
|---|
| 10:52PM |
2 |
Creating a global variable for a struct array |
| 8:55PM |
1 |
[RFC][LLVM] New Constant type for representing function PLT entries |
| 8:14PM |
0 |
Now I really have broken the build |
| 7:54PM |
2 |
Now I really have broken the build |
| 7:51PM |
0 |
Now I really have broken the build |
| 7:43PM |
2 |
Now I really have broken the build |
| 7:42PM |
2 |
Unifying CMake variable names used in checks across subprojects |
| 7:31PM |
0 |
Now I really have broken the build |
| 7:28PM |
0 |
Unifying CMake variable names used in checks across subprojects |
| 7:24PM |
0 |
Now I really have broken the build |
| 7:24PM |
2 |
Now I really have broken the build |
| 7:16PM |
0 |
Now I really have broken the build |
| 7:14PM |
0 |
Now I really have broken the build |
| 6:59PM |
4 |
Now I really have broken the build |
| 6:57PM |
2 |
Unifying CMake variable names used in checks across subprojects |
| 6:46PM |
0 |
Now I really have broken the build |
| 6:41PM |
0 |
Optimised-code debugging experience Round Table |
| 6:40PM |
0 |
Now I really have broken the build |
| 6:33PM |
2 |
Now I really have broken the build |
| 6:26PM |
0 |
Now I really have broken the build |
| 5:57PM |
0 |
[11.0.0 Release] Release Candidate 3 is here |
| 4:28PM |
0 |
Doxygen on Windows |
| 3:42PM |
2 |
Optimised-code debugging experience Round Table |
| 3:12PM |
8 |
[11.0.0 Release] Release Candidate 3 is here |
| 1:41PM |
1 |
enable target specific MC bankend in clang command line |
| 8:30AM |
0 |
raise exception failed on AARCH |
| 5:55AM |
2 |
How to clean-up SCEVs from sext/zext/trunc ? |
| 4:51AM |
0 |
OrcV1 removal |
| 2:44AM |
0 |
Is it valid to dereference a pointer that have undef bits in its offset? |
| 2:41AM |
2 |
Is it valid to dereference a pointer that have undef bits in its offset? |
| |
| Monday September 21 2020 |
| Time | Replies | Subject |
|---|
| 10:28PM |
0 |
[MTE] Globals Tagging - Discussion |
| 9:31PM |
0 |
Alias Analysis Round Table (Was: LLVM Alias Analysis Technical Call) |
| 8:48PM |
0 |
Is it valid to dereference a pointer that have undef bits in its offset? |
| 7:57PM |
0 |
How to clean-up SCEVs from sext/zext/trunc ? |
| 7:07PM |
0 |
TableGen Phabricator review |
| 6:59PM |
0 |
How to clean-up SCEVs from sext/zext/trunc ? |
| 6:41PM |
2 |
Is it valid to dereference a pointer that have undef bits in its offset? |
| 6:33PM |
0 |
Timeout tests timing out |
| 5:44PM |
1 |
LLVM Weekly - #351, September 21st 2020 |
| 5:41PM |
0 |
Is it valid to dereference a pointer that have undef bits in its offset? |
| 5:32PM |
2 |
Is it valid to dereference a pointer that have undef bits in its offset? |
| 2:05PM |
2 |
[MTE] Globals Tagging - Discussion |
| 1:47PM |
1 |
LLD: Can we make --warn-backrefs the default? |
| 1:38PM |
0 |
LLD: Can we make --warn-backrefs the default? |
| 11:20AM |
2 |
LLD: Can we make --warn-backrefs the default? |
| 6:46AM |
1 |
LLVM Dev Mtg: Moderators Needed! |
| |
| Sunday September 20 2020 |
| Time | Replies | Subject |
|---|
| 10:54PM |
0 |
Is it valid to dereference a pointer that have undef bits in its offset? |
| 10:47PM |
2 |
Is it valid to dereference a pointer that have undef bits in its offset? |
| 4:48PM |
0 |
extern calls interfere with optimizations |
| 4:07PM |
2 |
extern calls interfere with optimizations |
| |
| Saturday September 19 2020 |
| Time | Replies | Subject |
|---|
| 8:03PM |
0 |
Flakey lldb test failure (test_flash_load) |
| 4:26PM |
1 |
Realloca ? |
| 4:04PM |
1 |
Need help with source code |
| 11:24AM |
1 |
Bugzilla Migration Round Table |
| |
| Friday September 18 2020 |
| Time | Replies | Subject |
|---|
| 11:51PM |
3 |
GC-parseable element atomic memcpy/memmove |
| 11:31PM |
2 |
Timeout tests timing out |
| 11:12PM |
2 |
How to clean-up SCEVs from sext/zext/trunc ? |
| 8:11PM |
2 |
Removing DeadInstEliminationPass |
| 8:04PM |
1 |
Round Tables at the LLVM Dev Mtg (Submit by 9/25) |
| 7:51PM |
0 |
[MTE] Globals Tagging - Discussion |
| 7:18PM |
2 |
[MTE] Globals Tagging - Discussion |
| 6:45PM |
1 |
Making library calls for obj2yaml functionalities |
| 11:10AM |
0 |
[MTE] Globals Tagging - Discussion |
| 8:44AM |
0 |
Query target features? |
| 7:12AM |
0 |
Making library calls for obj2yaml functionalities |
| 6:59AM |
1 |
ORC JIT - Can modules independently managed with one LLJIT instance? |
| 6:51AM |
2 |
Making library calls for obj2yaml functionalities |
| 5:30AM |
0 |
[RFC][LLVM] New Constant type for representing function PLT entries |
| |
| Thursday September 17 2020 |
| Time | Replies | Subject |
|---|
| 10:46PM |
1 |
Unaligned Stack Pointer |
| 10:05PM |
4 |
[MTE] Globals Tagging - Discussion |
| 10:00PM |
2 |
[RFC][LLVM] New Constant type for representing function PLT entries |
| 7:51PM |
0 |
[NPM] Register target specific pass with opt |
| 7:34PM |
1 |
[NPM] Register target specific pass with opt |
| 7:20PM |
0 |
[NPM] Register target specific pass with opt |
| 7:14PM |
3 |
[NPM] Register target specific pass with opt |
| 3:39PM |
1 |
Unaligned Stack Pointer |
| 3:17PM |
0 |
Unaligned Stack Pointer |
| 2:42PM |
3 |
Unaligned Stack Pointer |
| 2:37PM |
1 |
llvm cross compilation issue |
| 2:10PM |
0 |
RISC-V LLVM sync-up call 17th September 2020 |
| 1:47PM |
0 |
llvm cross compilation issue |
| 1:27PM |
3 |
llvm cross compilation issue |
| 8:38AM |
1 |
[ELF] String literals don't obey -fdata-sections |
| 7:33AM |
0 |
Making library calls for obj2yaml functionalities |
| 5:31AM |
1 |
Timeout tests timing out |
| 5:23AM |
0 |
Timeout tests timing out |
| 4:31AM |
3 |
Timeout tests timing out |
| |
| Wednesday September 16 2020 |
| Time | Replies | Subject |
|---|
| 10:13PM |
0 |
OrcV1 removal |
| 9:53PM |
2 |
OrcV1 removal |
| 9:00PM |
2 |
Making library calls for obj2yaml functionalities |
| 7:48PM |
0 |
OrcV1 removal |
| 6:52PM |
4 |
OrcV1 removal |
| 5:42PM |
0 |
[ELF] String literals don't obey -fdata-sections |
| 4:55PM |
2 |
[Debuginfo] Changing llvm.dbg.value and DBG_VALUE to support multiple location operands |
| 4:36PM |
0 |
Timeout tests timing out |
| 1:33PM |
1 |
[cfe-dev] Phabricator -> GitHub PRs? |
| 1:22PM |
0 |
[cfe-dev] Phabricator -> GitHub PRs? |
| 1:14PM |
2 |
[ELF] String literals don't obey -fdata-sections |
| 12:01PM |
1 |
Aarch64: Build MachineInstruction for "ADR Xd, ." |
| 9:15AM |
2 |
[cfe-dev] Phabricator -> GitHub PRs? |
| 8:36AM |
0 |
[cfe-dev] Phabricator -> GitHub PRs? |
| 6:43AM |
4 |
[cfe-dev] Phabricator -> GitHub PRs? |
| 12:39AM |
0 |
[Debuginfo] Changing llvm.dbg.value and DBG_VALUE to support multiple location operands |
| |
| Tuesday September 15 2020 |
| Time | Replies | Subject |
|---|
| 11:33PM |
0 |
One day left for 2020 LLVM Virtual Developers' Meeting Merchandise |
| 10:24PM |
0 |
About AVRDevice.td |
| 10:18PM |
0 |
[ELF] String literals don't obey -fdata-sections |
| 10:07PM |
2 |
[Debuginfo] Changing llvm.dbg.value and DBG_VALUE to support multiple location operands |
| 9:48PM |
0 |
[cfe-dev] Phabricator -> GitHub PRs? |
| 8:32PM |
2 |
[ELF] String literals don't obey -fdata-sections |
| 8:32PM |
0 |
[Debuginfo] Changing llvm.dbg.value and DBG_VALUE to support multiple location operands |
| 6:19PM |
2 |
[Release-testers] [11.0.0 Release] Please help writing release notes! |
| 5:56PM |
2 |
[Debuginfo] Changing llvm.dbg.value and DBG_VALUE to support multiple location operands |
| 2:58PM |
0 |
Metadata in LLVM back-end |
| 2:46PM |
2 |
About AVRDevice.td |
| 2:23PM |
0 |
[Release-testers] [11.0.0 Release] Please help writing release notes! |
| 2:00PM |
1 |
Vectorization of math function failed? |
| 1:58PM |
0 |
Vectorization of math function failed? |
| 12:27PM |
2 |
Vectorization of math function failed? |
| 12:01PM |
1 |
Mem2reg: load before single store |
| 12:01PM |
0 |
[EXTERNAL] Re: Simulation of load-store forwarding with MI scheduler on AArch64 |
| 11:24AM |
2 |
[EXTERNAL] Re: Simulation of load-store forwarding with MI scheduler on AArch64 |
| 11:13AM |
0 |
Mem2reg: load before single store |
| 9:31AM |
2 |
Metadata in LLVM back-end |
| 8:37AM |
1 |
RewriteStatepointsForGC and Invoke |
| 12:17AM |
0 |
Buildbot numbers for the week of 09/06/2020 - 09/12/2020 |
| 12:17AM |
0 |
Buildbot numbers for the week of 08/30/2020 - 09/5/2020 |
| |
| Monday September 14 2020 |
| Time | Replies | Subject |
|---|
| 11:46PM |
0 |
Split-dwarf debug info for WebAssembly |
| 7:44PM |
1 |
Invalid transformation in LibCallSimplifier::replacePowWithSqrt? |
| 7:43PM |
2 |
[cfe-dev] Phabricator -> GitHub PRs? |
| 7:15PM |
0 |
Invalid transformation in LibCallSimplifier::replacePowWithSqrt? |
| 7:14PM |
0 |
[cfe-dev] Phabricator -> GitHub PRs? |
| 7:01PM |
0 |
LLVM Weekly - #350, September 14th 2020 |
| 7:00PM |
2 |
Invalid transformation in LibCallSimplifier::replacePowWithSqrt? |
| 6:51PM |
0 |
Simulation of load-store forwarding with MI scheduler on AArch64 |
| 5:41PM |
1 |
ORC JIT Weekly #21 -- OrcV1 removal, Removable code, and Remote TargetProcessControl |
| 5:26PM |
0 |
ORC JIT Weekly #21 -- OrcV1 removal, Removable code, and Remote TargetProcessControl |
| 5:14PM |
0 |
Cross compiling for ARMv7-m |
| 5:03PM |
0 |
Invalid transformation in LibCallSimplifier::replacePowWithSqrt? |
| 4:58PM |
2 |
Invalid transformation in LibCallSimplifier::replacePowWithSqrt? |
| 4:46PM |
2 |
Mem2reg: load before single store |
| 4:45PM |
0 |
Invalid transformation in LibCallSimplifier::replacePowWithSqrt? |
| 4:40PM |
2 |
Simulation of load-store forwarding with MI scheduler on AArch64 |
| 2:42PM |
2 |
Cross compiling for ARMv7-m |
| 2:30PM |
0 |
Mem2reg: load before single store |
| 12:02PM |
0 |
[Proposal][Debuginfo] dsymutil-like tool for ELF. |
| 11:17AM |
2 |
[Proposal][Debuginfo] dsymutil-like tool for ELF. |
| 7:19AM |
3 |
Mem2reg: load before single store |
| 6:01AM |
2 |
ORC JIT Weekly #21 -- OrcV1 removal, Removable code, and Remote TargetProcessControl |
| 2:21AM |
1 |
WebAssembly - Import functions from runtime |
| |
| Sunday September 13 2020 |
| Time | Replies | Subject |
|---|
| 8:51PM |
1 |
[cfe-dev] Phabricator -> GitHub PRs? |
| 8:36PM |
0 |
[cfe-dev] Phabricator -> GitHub PRs? |
| 7:34PM |
2 |
[cfe-dev] Phabricator -> GitHub PRs? |
| 2:51PM |
0 |
[cfe-dev] Phabricator -> GitHub PRs? |
| 2:38PM |
2 |
[cfe-dev] Phabricator -> GitHub PRs? |
| 1:35PM |
1 |
I've gone and broken the build |
| 1:24PM |
0 |
I've gone and broken the build |
| 12:10PM |
3 |
I've gone and broken the build |
| 11:43AM |
0 |
[cfe-dev] Phabricator -> GitHub PRs? |
| 11:28AM |
1 |
[cfe-dev] Phabricator -> GitHub PRs? |
| 5:20AM |
1 |
Accepted Review needs commit: [Docs] Fix --print-supported-cpus option rendering |
| 1:45AM |
0 |
I've gone and broken the build |
| 1:37AM |
2 |
Invalid transformation in LibCallSimplifier::replacePowWithSqrt? |
| |
| Saturday September 12 2020 |
| Time | Replies | Subject |
|---|
| 11:32PM |
2 |
I've gone and broken the build |
| 10:00PM |
0 |
I've gone and broken the build |
| 9:34PM |
2 |
I've gone and broken the build |
| 9:26PM |
0 |
I've gone and broken the build |
| 6:10PM |
1 |
I've gone and broken the build |
| 5:54PM |
0 |
I've gone and broken the build |
| 5:37PM |
2 |
I've gone and broken the build |
| 3:05AM |
1 |
New PowerPC Code Owner |
| 2:34AM |
4 |
[cfe-dev] Phabricator -> GitHub PRs? |
| 12:15AM |
0 |
[cfe-dev] Phabricator -> GitHub PRs? |
| |
| Friday September 11 2020 |
| Time | Replies | Subject |
|---|
| 10:56PM |
2 |
[cfe-dev] Phabricator -> GitHub PRs? |
| 10:53PM |
0 |
[cfe-dev] Phabricator -> GitHub PRs? |
| 10:44PM |
3 |
[cfe-dev] Phabricator -> GitHub PRs? |
| 10:31PM |
0 |
[cfe-dev] Phabricator -> GitHub PRs? |
| 10:12PM |
2 |
[cfe-dev] Phabricator -> GitHub PRs? |
| 7:54PM |
0 |
[RFC] Introducing the maynotprogress IR attribute |
| 7:24PM |
0 |
[Debuginfo] Changing llvm.dbg.value and DBG_VALUE to support multiple location operands |
| 6:33PM |
2 |
[RFC] Introducing the maynotprogress IR attribute |
| 6:31PM |
0 |
[cfe-dev] Phabricator -> GitHub PRs? |
| 6:12PM |
2 |
[Debuginfo] Changing llvm.dbg.value and DBG_VALUE to support multiple location operands |
| 6:04PM |
0 |
[RFC] Introducing the maynotprogress IR attribute |
| 5:39PM |
4 |
[cfe-dev] Phabricator -> GitHub PRs? |
| 4:42PM |
4 |
[RFC] Introducing the maynotprogress IR attribute |
| 6:00AM |
0 |
windows7-buildbot is red for a few months |
| 4:35AM |
4 |
Upcoming upgrade of LLVM buildbot |
| 3:34AM |
0 |
LLVM buildmaster will be updated and restarted soon |
| 12:53AM |
0 |
[RFC] Introducing the maynotprogress IR attribute |
| |
| Thursday September 10 2020 |
| Time | Replies | Subject |
|---|
| 10:26PM |
1 |
[RFC] Introducing the maynotprogress IR attribute |
| 9:49PM |
0 |
[RFC] Introducing the maynotprogress IR attribute |
| 8:48PM |
0 |
[IR] Modelling of GlobalIFunc |
| 8:47PM |
0 |
Transient failure on sanitizer-x86_64-linux |
| 8:34PM |
0 |
Code Coverage Compile Issue LLVM 10 |
| 8:19PM |
2 |
Transient failure on sanitizer-x86_64-linux |
| 6:21PM |
2 |
[RFC] Introducing the maynotprogress IR attribute |
| 5:54PM |
1 |
[RFC] New Feature Proposal: De-Optimizing Cold Functions using PGO Info |
| 5:34PM |
1 |
spill to register not stack? |
| 5:22PM |
0 |
[RFC] New Feature Proposal: De-Optimizing Cold Functions using PGO Info |
| 4:38PM |
0 |
spill to register not stack? |
| 4:13PM |
0 |
Change prototype for TargetInstrInfo::foldMemoryOperandImpl |
| 4:11PM |
2 |
[RFC] New Feature Proposal: De-Optimizing Cold Functions using PGO Info |
| 12:15PM |
2 |
[IR] Modelling of GlobalIFunc |
| 11:16AM |
2 |
Change prototype for TargetInstrInfo::foldMemoryOperandImpl |
| 11:04AM |
0 |
[RFC] [DebugInfo] Using DW_OP_entry_value within LLVM IR |
| 10:04AM |
0 |
LSR breaks debug info |
| 7:44AM |
2 |
LSR breaks debug info |
| 4:23AM |
0 |
[RFC] New Feature Proposal: De-Optimizing Cold Functions using PGO Info |
| 3:27AM |
2 |
Timeout tests timing out |
| 1:18AM |
0 |
[RFC] New Feature Proposal: De-Optimizing Cold Functions using PGO Info |
| 12:55AM |
2 |
[RFC] New Feature Proposal: De-Optimizing Cold Functions using PGO Info |
| |
| Wednesday September 9 2020 |
| Time | Replies | Subject |
|---|
| 9:59PM |
0 |
[RFC] Framework for Finding and Using Similarity at the IR Level |
| 9:00PM |
0 |
android buildbot timeout |
| 8:39PM |
2 |
Code Coverage Compile Issue LLVM 10 |
| 7:35PM |
1 |
constrained cosine rounding mode behavior |
| 7:22PM |
0 |
[cfe-dev] [RFC] New Feature Proposal: De-Optimizing Cold Functions using PGO Info |
| 7:10PM |
2 |
[RFC] New Feature Proposal: De-Optimizing Cold Functions using PGO Info |
| 6:48PM |
2 |
spill to register not stack? |
| 6:26PM |
0 |
[RFC] New Feature Proposal: De-Optimizing Cold Functions using PGO Info |
| 6:13PM |
0 |
spill to register not stack? |
| 5:58PM |
0 |
[RFC] New Feature Proposal: De-Optimizing Cold Functions using PGO Info |
| 5:30PM |
2 |
spill to register not stack? |
| 5:28PM |
2 |
[RFC] New Feature Proposal: De-Optimizing Cold Functions using PGO Info |
| 5:15PM |
0 |
[RFC] New Feature Proposal: De-Optimizing Cold Functions using PGO Info |
| 5:00PM |
0 |
Change prototype for TargetInstrInfo::foldMemoryOperandImpl |
| 4:37PM |
4 |
RFC: Promoting experimental reduction intrinsics to first class intrinsics |
| 4:35PM |
0 |
New PowerPC Code Owner |
| 3:19PM |
2 |
[RFC] [DebugInfo] Using DW_OP_entry_value within LLVM IR |
| 2:10PM |
2 |
[RFC] New Feature Proposal: De-Optimizing Cold Functions using PGO Info |
| 1:38PM |
0 |
[11.0.0 Release] Release status |
| 1:27PM |
0 |
[RFC] New Feature Proposal: De-Optimizing Cold Functions using PGO Info |
| 1:08PM |
0 |
New PowerPC Code Owner |
| 10:25AM |
4 |
[RFC] New Feature Proposal: De-Optimizing Cold Functions using PGO Info |
| 8:23AM |
0 |
[EXTERNAL] RE: Machinepipeliner interface. shouldIgnoreForPipelining, actually not ignoring. |
| 8:03AM |
0 |
[RFC] New Feature Proposal: De-Optimizing Cold Functions using PGO Info |
| 7:08AM |
2 |
[EXTERNAL] RE: Machinepipeliner interface. shouldIgnoreForPipelining, actually not ignoring. |
| 6:52AM |
0 |
[RFC] [DebugInfo] Using DW_OP_entry_value within LLVM IR |
| 5:28AM |
0 |
constrained cosine rounding mode behavior |
| 5:06AM |
0 |
[RFC] Introducing the maynotprogress IR attribute |
| 3:55AM |
3 |
constrained cosine rounding mode behavior |
| 2:08AM |
2 |
[RFC] Introducing the maynotprogress IR attribute |
| 1:46AM |
5 |
New PowerPC Code Owner |
| 1:01AM |
1 |
Loop Opt WG Meeting Agenda for Sep 9, 2020 |
| 12:20AM |
5 |
[RFC] New Feature Proposal: De-Optimizing Cold Functions using PGO Info |
| |
| Tuesday September 8 2020 |
| Time | Replies | Subject |
|---|
| 10:02PM |
0 |
[EXTERNAL] RE: Machinepipeliner interface. shouldIgnoreForPipelining, actually not ignoring. |
| 8:57PM |
1 |
BUG: complete misunterstanding of the MS-ABI |
| 8:42PM |
0 |
BUG: complete misunterstanding of the MS-ABI |
| 8:19PM |
0 |
BUG: complete misunterstanding of the MS-ABI |
| 7:02PM |
0 |
Loop Opt WG Meeting Agenda for Sep 9, 2020 |
| 6:57PM |
0 |
BUG: complete misunterstanding of the MS-ABI |
| 6:20PM |
1 |
llvm-as-3.3 needed |
| 6:07PM |
0 |
New PM for target-specific pre-isel IR passes |
| 5:55PM |
0 |
TableGen enhancements |
| 5:39PM |
0 |
[ADT] Adding instrumentation for ASAN to SmallVector |
| 5:22PM |
0 |
[IR] Modelling of GlobalIFunc |
| 5:14PM |
2 |
TableGen enhancements |
| 4:56PM |
0 |
LLVM-HPC2020 Workshop at SC20 - Call for papers - Deadline Extended |
| 4:54PM |
1 |
LLVM-HPC2020 Workshop at SC20 - Call for papers - Deadline Extended |
| 4:04PM |
0 |
Misleading documentation on FP to integer conversion instructions? |
| 3:57PM |
0 |
Metadata in LLVM back-end |
| 1:52PM |
0 |
[RFC] Introducing the maynotprogress IR attribute |
| 12:25PM |
2 |
[RFC] [DebugInfo] Using DW_OP_entry_value within LLVM IR |
| 4:26AM |
0 |
OrcV1 removal |
| |
| Monday September 7 2020 |
| Time | Replies | Subject |
|---|
| 10:38PM |
2 |
[RFC] Introducing the maynotprogress IR attribute |
| 9:48PM |
0 |
[RFC] Introducing the maynotprogress IR attribute |
| 9:15PM |
4 |
[RFC] Introducing the maynotprogress IR attribute |
| 8:55PM |
2 |
OrcV1 removal |
| 7:53PM |
0 |
OrcV1 removal |
| 7:52PM |
0 |
[RFC] Introducing the maynotprogress IR attribute |
| 6:13PM |
0 |
LLVM Weekly - #349, September 7th 2020 |
| 5:13PM |
0 |
[Job ad] Compiler/LLVM Software Engineer role at Imagination Technologies, - UK |
| 5:13PM |
0 |
Recall: [Job ad] Compiler/LLVM Software Engineer role at Imagination Technologies, - UK |
| 5:11PM |
0 |
[Job ad] Compiler/LLVM Software Engineer role at Imagination Technologies, - UK |
| 5:06PM |
3 |
[IR] Modelling of GlobalIFunc |
| 4:49PM |
2 |
[RFC] Introducing the maynotprogress IR attribute |
| 4:09PM |
0 |
Document TableGen classes with Doxygen? |
| 3:56PM |
0 |
[RFC] Introducing the maynotprogress IR attribute |
| 3:02PM |
2 |
New PM for target-specific pre-isel IR passes |
| 2:50PM |
2 |
[ADT] Adding instrumentation for ASAN to SmallVector |
| 2:21PM |
2 |
Document TableGen classes with Doxygen? |
| 2:17PM |
2 |
Pushing a patch |
| 2:06PM |
0 |
[RFC] [DebugInfo] Using DW_OP_entry_value within LLVM IR |
| 1:56PM |
0 |
LTO'd / PGO'd Pre-built Release Binary |
| 12:50PM |
2 |
LTO'd / PGO'd Pre-built Release Binary |
| 9:17AM |
2 |
Change prototype for TargetInstrInfo::foldMemoryOperandImpl |
| 8:32AM |
0 |
LLD: Can we make --warn-backrefs the default? |
| 8:26AM |
2 |
Metadata in LLVM back-end |
| 6:49AM |
2 |
[EXTERNAL] RE: Machinepipeliner interface. shouldIgnoreForPipelining, actually not ignoring. |
| 6:16AM |
2 |
OrcV1 removal |
| 6:03AM |
0 |
Performance of JIT execution |
| 4:55AM |
0 |
LLVM buildmaster will be updated and restarted soon |
| |
| Sunday September 6 2020 |
| Time | Replies | Subject |
|---|
| 11:12PM |
0 |
Where's the optimiser gone? Or: who reviews the code you ship? |
| 11:33AM |
0 |
Abysmal performance of 64/64-bit integer division |
| 11:29AM |
0 |
Disastrous performance of 128/128-bit integer division |
| |
| Saturday September 5 2020 |
| Time | Replies | Subject |
|---|
| 11:50AM |
1 |
include/llvm/ADT/SmallVector.h:491:7: warning: array subscript 1 is outside array bounds of ‘char [1]’ [-Warray-bounds] |
| 5:40AM |
0 |
[RFC] Introducing the maynotprogress IR attribute |
| 5:04AM |
4 |
[RFC] Introducing the maynotprogress IR attribute |
| 4:16AM |
1 |
Possible AVX512 codegen bug in LLVM 10.0.1? |
| 4:11AM |
0 |
Possible AVX512 codegen bug in LLVM 10.0.1? |
| 3:49AM |
2 |
Possible AVX512 codegen bug in LLVM 10.0.1? |
| 1:30AM |
0 |
Intel AMX programming model discussion. |
| 12:39AM |
0 |
[RFC] Introducing the maynotprogress IR attribute |
| |
| Friday September 4 2020 |
| Time | Replies | Subject |
|---|
| 11:31PM |
2 |
[RFC] Introducing the maynotprogress IR attribute |
| 10:02PM |
2 |
LLD: Can we make --warn-backrefs the default? |
| 7:40PM |
3 |
Misleading documentation on FP to integer conversion instructions? |
| 6:40PM |
0 |
Misleading documentation on FP to integer conversion instructions? |
| 6:37PM |
0 |
Misleading documentation on FP to integer conversion instructions? |
| 6:02PM |
4 |
Misleading documentation on FP to integer conversion instructions? |
| 5:51PM |
0 |
Misleading documentation on FP to integer conversion instructions? |
| 4:29PM |
0 |
Flakey failure on clang-ppc64le-linux-multistage |
| 3:59PM |
0 |
[Debuginfo] Changing llvm.dbg.value and DBG_VALUE to support multiple location operands |
| 2:42PM |
0 |
Saturating float-to-int casts |
| 2:40PM |
2 |
Flakey failure on clang-ppc64le-linux-multistage |
| 2:20PM |
0 |
Misleading documentation on FP to integer conversion instructions? |
| 1:50PM |
2 |
Intel AMX programming model discussion. |
| 1:47PM |
0 |
Intel AMX programming model discussion. |
| 1:26PM |
2 |
Misleading documentation on FP to integer conversion instructions? |
| 10:42AM |
2 |
[Proposal][Debuginfo] dsymutil-like tool for ELF. |
| 10:30AM |
1 |
Where's the optimiser gone? Or: who reviews the code you ship? |
| 10:00AM |
2 |
[Debuginfo] Changing llvm.dbg.value and DBG_VALUE to support multiple location operands |
| 9:58AM |
2 |
Intel AMX programming model discussion. |
| 8:37AM |
0 |
Intel AMX programming model discussion. |
| 2:00AM |
2 |
Performance of JIT execution |
| 1:51AM |
0 |
using experimental intrinsics failed |
| 1:16AM |
2 |
using experimental intrinsics failed |
| 1:14AM |
0 |
using experimental intrinsics failed |
| 12:53AM |
2 |
using experimental intrinsics failed |
| 12:40AM |
0 |
using experimental intrinsics failed |
| 12:15AM |
0 |
LLD: Can we make --warn-backrefs the default? |
| |
| Thursday September 3 2020 |
| Time | Replies | Subject |
|---|
| 11:27PM |
0 |
[Job Ad] Technical Lead / Manager for Google MLIR compiler infrastructure team |
| 11:08PM |
2 |
LLD: Can we make --warn-backrefs the default? |
| 10:36PM |
0 |
Flakey failure on clang-ppc64le-linux-multistage |
| 10:34PM |
0 |
LLD: Can we make --warn-backrefs the default? |
| 10:23PM |
2 |
Flakey failure on clang-ppc64le-linux-multistage |
| 10:22PM |
0 |
Flakey failure on clang-ppc64le-linux-multistage |
| 9:00PM |
3 |
LLD: Can we make --warn-backrefs the default? |
| 8:15PM |
2 |
Flakey failure on clang-ppc64le-linux-multistage |
| 7:45PM |
0 |
LLD: Can we make --warn-backrefs the default? |
| 7:41PM |
0 |
[EXTERNAL] RE: Machinepipeliner interface. shouldIgnoreForPipelining, actually not ignoring. |
| 7:37PM |
0 |
Flakey failure on clang-ppc64le-linux-multistage |
| 7:33PM |
3 |
Flakey failure on clang-ppc64le-linux-multistage |
| 7:07PM |
1 |
[EXTERNAL] RE: Machinepipeliner interface. shouldIgnoreForPipelining, actually not ignoring. |
| 6:46PM |
0 |
LLVM buildmaster will be updated and restarted tonight |
| 6:24PM |
0 |
Flakey failure on clang-ppc64le-linux-multistage |
| 6:13PM |
2 |
Flakey failure on clang-ppc64le-linux-multistage |
| 5:56PM |
0 |
[Proposal][Debuginfo] dsymutil-like tool for ELF. |
| 5:34PM |
1 |
[cfe-dev] Can we remove llvmbb from IRC? |
| 4:59PM |
0 |
Flakey failure on clang-ppc64le-linux-multistage |
| 4:19PM |
2 |
[EXTERNAL] RE: Machinepipeliner interface. shouldIgnoreForPipelining, actually not ignoring. |
| 3:47PM |
0 |
[cfe-dev] Can we remove llvmbb from IRC? |
| 3:08PM |
0 |
[RFC] Switching to MemorySSA-backed Dead Store Elimination (aka cross-bb DSE) |
| 3:02PM |
0 |
Machinepipeliner interface. shouldIgnoreForPipelining, actually not ignoring. |
| 2:10PM |
1 |
RISC-V LLVM sync-up call 3rd September 2020 |
| 12:15PM |
2 |
[Proposal][Debuginfo] dsymutil-like tool for ELF. |
| 12:02PM |
2 |
Flakey failure on clang-ppc64le-linux-multistage |
| 8:51AM |
1 |
Proposal to remove MMX support. |
| 6:46AM |
3 |
using experimental intrinsics failed |
| 4:47AM |
0 |
Merging in a new Target |
| 12:09AM |
0 |
Building LLVM in WSL fails |
| |
| Wednesday September 2 2020 |
| Time | Replies | Subject |
|---|
| 11:36PM |
0 |
[Debuginfo] Changing llvm.dbg.value and DBG_VALUE to support multiple location operands |
| 10:36PM |
0 |
[Proposal][Debuginfo] dsymutil-like tool for ELF. |
| 10:26PM |
2 |
[Proposal][Debuginfo] dsymutil-like tool for ELF. |
| 7:51PM |
0 |
Flakey failure on clang-ppc64le-linux-multistage |
| 6:44PM |
0 |
[Proposal][Debuginfo] dsymutil-like tool for ELF. |
| 5:47PM |
2 |
Flakey failure on clang-ppc64le-linux-multistage |
| 5:43PM |
2 |
[EXTERNAL] Re: Machinepipeliner interface. shouldIgnoreForPipelining, actually not ignoring. |
| 4:56PM |
2 |
[Proposal][Debuginfo] dsymutil-like tool for ELF. |
| 2:01PM |
2 |
[Debuginfo] Changing llvm.dbg.value and DBG_VALUE to support multiple location operands |
| 12:48PM |
0 |
Flakey failure on clang-ppc64le-linux-multistage |
| 10:04AM |
2 |
[RFC] Framework for Finding and Using Similarity at the IR Level |
| 6:27AM |
1 |
Address broken after blog.llvm.org upgrade |
| 2:24AM |
0 |
[RFC] Framework for Finding and Using Similarity at the IR Level |
| 1:12AM |
0 |
[cfe-dev] Can we remove llvmbb from IRC? |
| 12:34AM |
2 |
LLD: Can we make --warn-backrefs the default? |
| |
| Tuesday September 1 2020 |
| Time | Replies | Subject |
|---|
| 10:10PM |
2 |
Flakey failure on clang-ppc64le-linux-multistage |
| 10:03PM |
2 |
[RFC] Switching to MemorySSA-backed Dead Store Elimination (aka cross-bb DSE) |
| 9:29PM |
2 |
[RFC] Framework for Finding and Using Similarity at the IR Level |
| 8:20PM |
2 |
[cfe-dev] Can we remove llvmbb from IRC? |
| 7:57PM |
0 |
[cfe-dev] Can we remove llvmbb from IRC? |
| 7:42PM |
2 |
[cfe-dev] Can we remove llvmbb from IRC? |
| 7:32PM |
0 |
[cfe-dev] Can we remove llvmbb from IRC? |
| 7:10PM |
0 |
[cfe-dev] Can we remove llvmbb from IRC? |
| 7:10PM |
0 |
[cfe-dev] Can we remove llvmbb from IRC? |
| 7:07PM |
8 |
Can we remove llvmbb from IRC? |
| 6:04PM |
0 |
Filename's in DIBuileder |
| 6:01PM |
0 |
[RFC][LLVM] New Constant type for representing function PLT entries |
| 5:32PM |
0 |
Filename's in DIBuileder |
| 5:18PM |
0 |
[Proposal][Debuginfo] dsymutil-like tool for ELF. |
| 5:10PM |
4 |
Filename's in DIBuileder |
| 5:07PM |
0 |
[Proposal][Debuginfo] dsymutil-like tool for ELF. |
| 5:06PM |
0 |
Filename's in DIBuileder |
| 4:19PM |
2 |
Filename's in DIBuileder |
| 4:15PM |
0 |
EmitTargetCodeForMemSet & LTO issue |
| 3:51PM |
0 |
Vector evolution? |
| 3:42PM |
1 |
More on DemandedBits |
| 3:23PM |
2 |
Vector evolution? |
| 3:10PM |
0 |
Vector evolution? |
| 1:54PM |
2 |
[RFC] [DebugInfo] Using DW_OP_entry_value within LLVM IR |
| 1:36PM |
2 |
[Proposal][Debuginfo] dsymutil-like tool for ELF. |
| 11:07AM |
2 |
Vector evolution? |
| 10:32AM |
0 |
[lld] [arm] Linker Cannot Set Custom Section Type to NOBITS |
| 10:11AM |
1 |
Phabricator new review email behaviour change? |
| 9:50AM |
0 |
Vectorization of math function failed? |
| 9:41AM |
3 |
Vectorization of math function failed? |
| 9:38AM |
0 |
[RFC] [DebugInfo] Using DW_OP_entry_value within LLVM IR |
| 9:26AM |
0 |
Vectorization of math function failed? |
| 8:51AM |
2 |
Vectorization of math function failed? |
| 8:18AM |
0 |
LLD: Can we make --warn-backrefs the default? |
| 7:51AM |
0 |
[RFC] [DebugInfo] Using DW_OP_entry_value within LLVM IR |
| 7:35AM |
4 |
[RFC] [DebugInfo] Using DW_OP_entry_value within LLVM IR |
| 7:26AM |
2 |
[lld] [arm] Linker Cannot Set Custom Section Type to NOBITS |
| 7:07AM |
0 |
Vectorization of math function failed? |
| 7:05AM |
0 |
Should llvm optimize 1.0 / x ? |
| 6:46AM |
2 |
Vectorization of math function failed? |
| 6:44AM |
2 |
Should llvm optimize 1.0 / x ? |
| 6:29AM |
0 |
HTTP library in LLVM |
| 6:22AM |
2 |
HTTP library in LLVM |
| 3:27AM |
0 |
[Proposal][Debuginfo] dsymutil-like tool for ELF. |
| 3:24AM |
1 |
[Proposal][Debuginfo] dsymutil-like tool for ELF. |
| 2:44AM |
0 |
Buildbot numbers for the week of 08/23/2020 - 08/29/2020 |
| 2:43AM |
0 |
Buildbot numbers for the week of 08/16/2020 - 08/22/2020 |
| 2:43AM |
0 |
Buildbot numbers for the week of 08/09/2020 - 08/15/2020 |
| 2:05AM |
0 |
Vectorization of math function failed? |
| 12:21AM |
0 |
HTTP library in LLVM |