llvm dev - Nov 2017 - Conditional includes in TableGen?

Hello the list,

We have just moved things over to using the new multiple register size things,
but this is not (yet?) supported by FastISel.  This isn’t an issue for us,
because fast isel never worked for our extensions to base MIPS.  We’ve
temporarily simply disabled fast isel entirely, but it would be nice if we could
only include our .td file for the TableGen runs that are *not* generating the
fast isel code.

Looking at the tablegen docs, I can’t see any mechanism that allows me to
conditionally include a file.  Does this exist in any form?

David

I don't think there is no C-style conditional include in tablegen. Maybe
you can do what you want by defining a file scope Predicates?


2017-11-06 21:50 GMT+08:00 David Chisnall via llvm-dev <
llvm-dev at lists.llvm.org>:
> Hello the list,
>
> We have just moved things over to using the new multiple register size
> things, but this is not (yet?) supported by FastISel.  This isn’t an issue
> for us, because fast isel never worked for our extensions to base MIPS.
> We’ve temporarily simply disabled fast isel entirely, but it would be nice
> if we could only include our .td file for the TableGen runs that are *not*
> generating the fast isel code.
>
> Looking at the tablegen docs, I can’t see any mechanism that allows me to
> conditionally include a file.  Does this exist in any form?
>
> David
>
> _______________________________________________
> LLVM Developers mailing list
> llvm-dev at lists.llvm.org
> http://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-dev
>


-- 
Wei-Ren Chen (陳韋任)
Homepage: https://people.cs.nctu.edu.tw/~chenwj
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There isn't really any such thing.

You can hack it though through invocations of llvm-tblgen:

real/conditional.td    <- the actual .td file
fake/conditional.td    <- empty

For the invocations that use the real file:
   llvm-tblgen -Ireal ...
The the other ones:
   llvm-tblgen -Ifake ...

It's not pretty, but it may do as a workaround. If there is a need for 
it, maybe we could consider implementing some simple preprocessing 
directives, such as #if/#else/#endif and #define for macros (without 
logical operators), but only allow boolean values (i.e. a macro is 
either defined or not defined, and that's it).

-Krzysztof


On 11/6/2017 7:50 AM, David Chisnall via llvm-dev wrote:
> Hello the list,
> 
> We have just moved things over to using the new multiple register size
things, but this is not (yet?) supported by FastISel.  This isn’t an issue for
us, because fast isel never worked for our extensions to base MIPS.  We’ve
temporarily simply disabled fast isel entirely, but it would be nice if we could
only include our .td file for the TableGen runs that are *not* generating the
fast isel code.
> 
> Looking at the tablegen docs, I can’t see any mechanism that allows me to
conditionally include a file.  Does this exist in any form?
> 
> David
> 
> _______________________________________________
> LLVM Developers mailing list
> llvm-dev at lists.llvm.org
> http://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-dev
> 
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