llvm dev - Aug 2017 - Implict output register allocation in two operands instructions set.

Hi,

I'm implementing the registers allocation for Instructions Set where
arithmetic operations only have two input explicit operands.
The result is always assigned to an implicit output register depending of the
operation.

For example, the LADDS_A_oo operation has two inputs offset operands, but the
output is FA_ROUTADD register.
            def                   LADDS_A_oo   : CLPFPU_A_oo<0b0000100001,
                                                (ins
FPUaOffsetOperand:$OffsetA,FPUaOffsetOperand:$OffsetB),
                                                (outs
FPUaROUTRegisterClass:$FA_ROUTADD),
                                                [FA_ROUTADD,RFLAGA],            
// list of implicit registers
                                               
"ladds_a\t$OffsetA,$OffsetB",
                                                [(set i16:$FA_ROUTADD, (add
i16:$OffsetA, i16:$OffsetB))],NoItinerary>;


A small code seems to be correctly lowered as follow.

Total amount of phi nodes to update: 0
*** MachineFunction at end of ISel ***
# Machine code for function add16_reg_reg: SSA
Function Live Ins: %FA_ROFF0 in %vreg0, %FA_ROFF1 in %vreg1

BB#0: derived from LLVM BB %0
    Live Ins: %FA_ROFF0 %FA_ROFF1
                %vreg1<def> = COPY %FA_ROFF1; FPUaOffsetClass:%vreg1
                %vreg0<def> = COPY %FA_ROFF0; FPUaOffsetClass:%vreg0
                %vreg2<def> = LADDS_A_oo %vreg0, %vreg1,
%FA_ROUTADD<imp-def,dead>, %RFLAGA<imp-def,dead>;
FPUaROUTRegisterClass:%vreg2 FPUaOffsetClass:%vreg0,%vreg1
                %FA_ROFF0<def> = COPY %vreg2; FPUaROUTRegisterClass:%vreg2
                %vreg3<def> = MOVSUTO_SU_os_rpc 0,
%FA_ROFF0<imp-use>; SUSpecialRPCRegisterClass:%vreg3

# End machine code for function add16_reg_reg.
>From a register allocation point of view, this program will work only if
vreg2 is allocated to the FA_ROUTADD register.
Is there a registers allocation pass that substitute the virtual register
(vreg2) allocated to be assigned to the result of the operation with the
physical one (FA_ROUTADD) where the result is assigned by the processor?
The physical register depend of the operations for additions it is FA_ROUTADD,
but for division it is FA_ROUTDIV and multiplication it is FA_ROUTMUL?
Thanks,                Dominique Torette.





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Dominique Torette
System Architect
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Tel: +32 (0) 4 361 81 11 - Fax: +32 (0) 4 361 81 20
www.spacebel.be<http://www.spacebel.be/>



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On 8/29/2017 3:10 AM, Dominique Torette via llvm-dev
wrote:
> Is there a registers allocation pass that substitute the virtual 
> register (vreg2) allocated to be assigned to the result of the operation 
> with the physical one (FA_ROUTADD) where the result is assigned by the 
> processor?
A better way of doing this would be to specify the outs list as empty 
and add FA_ROUTADD to the Defs set.

-Krzysztof

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