> On Aug 4, 2017, at 11:14 AM, Pete Couperus via llvm-dev <llvm-dev at
lists.llvm.org> wrote:
>
> Hello,
>
> We at Synopsys would like to propose integration of a backend targeting
> the Synopsys ARC architecture. ARC is a configurable 32-bit processor
> family with a variety of optional extensions.
> See:
>
https://www.synopsys.com/designware-ip/processor-solutions/arc-processors.html
<https://www.synopsys.com/designware-ip/processor-solutions/arc-processors.html>
>
> We have been using LLVM internally for a number of years. The current
> plan, if accepted by the community, is to contribute an minimal,
> functional backend that would be an experimental target while we
> incrementally add features until we have a more fully featured backend.
I don’t know anything about the particulars of the ARC architectures, but it
would be great to have this in tree! Please make sure it follows coding
conventions etc.
-Chris
>
> About ARC:
> * There are two currently supported ISA versions supported by gcc, v1 and
v2.
> * The ARC ISA is a mixed 32-/16-bit ISA.
> * Has both big and little endian modes.
> * Individual instructions may have different variants and encodings.
> * Is configurable with a number of instructions that can be configured
> in or out of a particular processor configuration.
>
> The current proposed submission:
> * Only targets ARC v2.
> * Includes a small functional subset of the 32-bit ISA, little endian.
> * Targets a fixed subset of the ARC v2 ISA.
> * Focuses on C99 support.
> * Implements Target registration, and a SelectionDAG based instruction
selector.
> * Implements Register and the ISA specification for current subset.
> * Implements the Assembly printer and disassembler.
>
> See:
> https://reviews.llvm.org/D36331 <https://reviews.llvm.org/D36331>
>
> Following shortly:
> * Clang driver and target triple support.
>
> Planned:
> * C++ (Exception Handling).
> * Assembly Parsing/Direct ELF emission.
> * GlobalISel.
>
> With community agreement, our plan is to:
> 1. Contribute the current fixed configuration target.
> 2. Incrementally add the currently missing variants
> and additional instructions for this fixed target.
> 3. Add support for different ARC configurations and
> target specific features.
> 4. Implement the planned features from the LLVM framework
> not specific to ARC.
>
> Thanks for reading this far, feedback and comments welcome!
>
> Pete
>
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