Haidl, Michael via llvm-dev
2017-Aug-03 22:48 UTC
[llvm-dev] Status of llvm.experimental.vector.reduce.* intrinsics
Hi Amara, thank you for the clarification. I tested the intrinsics x86_64 and it seemed to work pretty well. Looking forward to try this intrinsics with the AArch64 backend. Maybe I find the time to look into codegen to get this intrinsics out of experimental stage. They seem pretty useful. Cheers, Michael -----Original Message----- From: Amara Emerson [amara.emerson at gmail.com] Received: Donnerstag, 03 Aug. 2017, 14:50 To: michael.haidl at uni-muenster.de [michael.haidl at uni-muenster.de] CC: llvm-dev at lists.llvm.org [llvm-dev at lists.llvm.org] Subject: Re: [llvm-dev] Status of llvm.experimental.vector.reduce.* intrinsics Hi Michael, The intrinsics are still technically in an experimental state as we need to have a further discussion to build consensus before marking them as fully supported. The AArch64 backend has been using them for all *natively supported* vector reductions for a few months now, with no issues as far as I'm aware. There are some rough edges which need some further work. For example, we're currently relying on a TTI hook to determine whether or not we create an intrinsic call or degenerate into a shuffevector sequence based on the reduction type. This was intended as a transitional stage. To mark the intrinsics as being first class operations we probably need to add support in codegen to expand the VECREDUCE_* nodes into the shufflevector reduction pattern, so that targets can generate the intrinsics in all cases without having to rely on TTI. Amara On 3 August 2017 at 12:03, Haidl, Michael via llvm-dev <llvm-dev at lists.llvm.org<mailto:llvm-dev at lists.llvm.org>> wrote: Hi, I was wandering about the status of the llvm.experimental.vector.reduce.* intrinsics. Are all back-ends supporting those intrinsics or are they still in a very "experimental" state? Thanks, Michael _______________________________________________ LLVM Developers mailing list llvm-dev at lists.llvm.org<mailto:llvm-dev at lists.llvm.org> http://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-dev -------------- next part -------------- An HTML attachment was scrubbed... URL: <http://lists.llvm.org/pipermail/llvm-dev/attachments/20170803/d6fb1d1b/attachment.html>
Renato Golin via llvm-dev
2017-Aug-04 06:18 UTC
[llvm-dev] Status of llvm.experimental.vector.reduce.* intrinsics
On 3 August 2017 at 19:48, Haidl, Michael via llvm-dev <llvm-dev at lists.llvm.org> wrote:> thank you for the clarification. I tested the intrinsics x86_64 and it > seemed to work pretty well. Looking forward to try this intrinsics with > the AArch64 backend. Maybe I find the time to look into codegen to get > this intrinsics out of experimental stage. They seem pretty useful.In addition to Amara's point, it'd be good to have it working and default for other architectures before we can move out of experimental if we indeed intend to make it non-arch-specific (which we do). So, if you could share your code for the x86 port, that'd be great. But if you could help with the final touches on the code-gen part, that'd be awesome. cheers, --renato
Haidl, Michael via llvm-dev
2017-Aug-04 12:36 UTC
[llvm-dev] Status of llvm.experimental.vector.reduce.* intrinsics
Hi Renato, just to make it clear, I didn't implement reductions on x86_64 they just worked when I tried to lower an llvm.experimentel.vector.reduce.or.i1.v8i1 intrinsic. A shuffle pattern is generated for the intrinsic. vpshufd $78, %xmm0, %xmm1 # xmm1 = xmm0[2,3,0,1] vpor %xmm1, %xmm0, %xmm0 vpshufd $229, %xmm0, %xmm1 # xmm1 = xmm0[1,1,2,3] vpor %xmm1, %xmm0, %xmm0 vpsrld $16, %xmm0, %xmm1 vpor %xmm1, %xmm0, %xmm0 vpextrb $0, %xmm0, %eax However, on AArche64 I encountered an unreachable where codegen does not know how to promote the i1 type. Since I am more familiar with the midlevel I have to start digging into codegen. Any hints where to start would be awesome. Cheers, Michael Am 04.08.2017 um 08:18 schrieb Renato Golin:> On 3 August 2017 at 19:48, Haidl, Michael via llvm-dev > <llvm-dev at lists.llvm.org> wrote: >> thank you for the clarification. I tested the intrinsics x86_64 and it >> seemed to work pretty well. Looking forward to try this intrinsics with >> the AArch64 backend. Maybe I find the time to look into codegen to get >> this intrinsics out of experimental stage. They seem pretty useful. > > In addition to Amara's point, it'd be good to have it working and > default for other architectures before we can move out of experimental > if we indeed intend to make it non-arch-specific (which we do). > > So, if you could share your code for the x86 port, that'd be great. > But if you could help with the final touches on the code-gen part, > that'd be awesome. > > cheers, > --renato >