llvm dev - Aug 2017 - Bug or incorrect use of inline asm?

Hi all,
  I stumbled upon either a bug, or we are emitting wrong inline asm code.

The testcase is:
```
source_filename = "testcase.d"
target datalayout = "e-m:o-i64:64-f80:128-n8:16:32:64-S128"
target triple = "x86_64-apple-macosx"

define void @_D7asanasm3fooFZv() {
  %a = alloca [4 x i32], align 32
  call void asm sideeffect "movl %ebx, 4+$0",
"=*m,~{memory}"([4 x i32]* %a)
  ret void
}
```

When I try to compile this to assembly code with llc, llc
errors.
> llc testcase.ll -o testcase.s -O0
<inline asm>:1:16: error: unknown token in expression
        movl %ebx, 4+(%rsp)
                      ^

The explicit `-O0` is required for the error to arise.

The error is gone after removing (or reducing) the alignment of `%a`. This
makes me believe that our inline asm syntax is correct to add an offset to
a pointer: " 4+$0 ".

Is this a bug in the asm parser?

Thanks,
  Johan
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2017-08-03 8:58 GMT-07:00 Johan Engelen via llvm-dev <llvm-dev at
lists.llvm.org>:
> The error is gone after removing (or reducing) the alignment of `%a`. This
> makes me believe that our inline asm syntax is correct to add an offset to
a
> pointer: " 4+$0 ".
The AT&T syntax for a displaced address doesn't have the '+';
it's
just "4(%rsp)" so you should change the IR to "4$0".

LLVM appears to be optimizing the addressing mode, and the optimizer
is being more lenient on this detail so you're getting lucky when the
+4 can be combined with an existing %rsp offset.

Cheers.

Tim.

On Thu, Aug 3, 2017 at 6:19 PM, Tim Northover <t.p.northover at gmail.com>
wrote:
> 2017-08-03 8:58 GMT-07:00 Johan Engelen via llvm-dev <
> llvm-dev at lists.llvm.org>:
> > The error is gone after removing (or reducing) the alignment of `%a`.
> This
> > makes me believe that our inline asm syntax is correct to add an
offset
> to a
> > pointer: " 4+$0 ".
>
> The AT&T syntax for a displaced address doesn't have the
'+'; it's
> just "4(%rsp)" so you should change the IR to "4$0".
>
I thought I had tested exactly that and observed wrong behaviour. But now I
see it works well... confused.
Thanks!
  Johan
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On Thu, Aug 3, 2017 at 6:19 PM, Tim Northover <t.p.northover at gmail.com>
wrote:
> 2017-08-03 8:58 GMT-07:00 Johan Engelen via llvm-dev <
> llvm-dev at lists.llvm.org>:
> > The error is gone after removing (or reducing) the alignment of `%a`.
> This
> > makes me believe that our inline asm syntax is correct to add an
offset
> to a
> > pointer: " 4+$0 ".
>
> The AT&T syntax for a displaced address doesn't have the
'+'; it's
> just "4(%rsp)" so you should change the IR to "4$0".
>
> LLVM appears to be optimizing the addressing mode, and the optimizer
> is being more lenient on this detail so you're getting lucky when the
> +4 can be combined with an existing %rsp offset.

Things break down when part of the offset is a linktime constant:

```
source_filename = "asanasm.d"
target datalayout = "e-m:w-i64:64-f80:128-n8:16:32:64-S128"
target triple = "x86_64-pc-windows-msvc"

@globVar = global [2 x i32] [i32 66051, i32 66051]

define void @_D7asanasm8offconstFZv() {
  call void asm sideeffect "movdqa 4$0, %xmm7",
"*m,~{xmm7}"([2 x i32]*
@globVar)
  ret void
}
```

results in:
<inline asm>:1:10: error: unexpected token in argument list
        movdqa 4globVar(%rip), %xmm7

So in that case, I do have to add the '+' to make it work
("4+$0").

So depending on the pointer argument, I need to write a + or without +,
complicating automatic codegen.

Thanks for the help,
  Johan
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On Thu, Aug 3, 2017 at 9:19 AM Tim Northover via llvm-dev <
llvm-dev at lists.llvm.org> wrote:
> 2017-08-03 8:58 GMT-07:00 Johan Engelen via llvm-dev <
> llvm-dev at lists.llvm.org>:
> > The error is gone after removing (or reducing) the alignment of `%a`.
> This
> > makes me believe that our inline asm syntax is correct to add an
offset
> to a
> > pointer: " 4+$0 ".
>
> The AT&T syntax for a displaced address doesn't have the
'+'; it's
> just "4(%rsp)" so you should change the IR to "4$0".
>
> LLVM appears to be optimizing the addressing mode, and the optimizer
> is being more lenient on this detail so you're getting lucky when the
> +4 can be combined with an existing %rsp offset.
>
>
FWIW we do support:

4+4(%rsp)

as 8(%rsp)

we just don't support

4+(%rsp)

but do support

4+0(%rsp)

as 4(%rsp)

oddly enough gas does support the 4+(%rsp) but I've never had time to go
try to fix it in the assembler.

-eric
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