Assem Bsoul via llvm-dev
2016-Jun-21 20:18 UTC
[llvm-dev] DAGCombiner folds (xor (and x, y), y) -> (and (not x), y). Can I do the reverse for a target?
In SystemZ, for 64-bit operands, (not x) is translated as two xor instructions, i.e., XORing the high and low half words of x with 32-bit immediate. The other form that I want will reduce the instruction count by 1 because (and x, y) is translated as a single instruction. PS. I am copying the below because I am not sure if it will be included in the reply by default Thanks Assem On Tue, Jun 21, 2016 at 12:49:14PM -0400, Assem Bsoul via llvm-dev wrote:> DAGCombiner currently folds (xor (and x, y), y) -> (and (not x), y) > > I was trying to do the reverse of this transformation, i.e., (and (xor x, > -1), y) -> (xor (and x, y), y), and recognized that this causes aninfinite> loop. What's the advantage of doing the above folding? if I want to dothe> reverse for a specific target where I can place that and make sure it > doesn't get reversed by the above folding?The goal of the transform is to provide a simpler canonical form. E.g. (not x) can be computed independently and it is also easier to reason about. Why is it beneficial for your target to have the first form? Joerg -------------- next part -------------- An HTML attachment was scrubbed... URL: <http://lists.llvm.org/pipermail/llvm-dev/attachments/20160621/7645af68/attachment.html>
Joerg Sonnenberger via llvm-dev
2016-Jun-21 21:23 UTC
[llvm-dev] DAGCombiner folds (xor (and x, y), y) -> (and (not x), y). Can I do the reverse for a target?
On Tue, Jun 21, 2016 at 04:18:28PM -0400, Assem Bsoul via llvm-dev wrote:> In SystemZ, for 64-bit operands, (not x) is translated as two xor > instructions, i.e., XORing the high and low half words of x with 32-bit > immediate. The other form that I want will reduce the instruction count by > 1 because (and x, y) is translated as a single instruction.In that case, you can directly pattern match the canonical form. Joerg