Romaric Jodin via llvm-dev
2016-May-24 09:39 UTC
[llvm-dev] BitcodeReader non explicit error
Hi,
I'm working on OpenCL and I'm using clang as compiler (based on clang
3.7.0).
I have a issue, I'm generating a bitcode file (that I can print before
before the generation). But when I'm trying to read it again with clang, I
have this issue:
"error: Invalid record"
How can I managed to know where it comes from?
Thank you,
Romaric
Here is what is print before the generation of the bitcode:
##################################################################################################################################
##################################################################################################################################
; ModuleID = '/nfs/home/.cache/pocl/kcache/temp_sTRQB2.cl'
target datalayout = "e-p:32:32-i64:64-n8:16:32:64-S64"
target triple = "k1b---k1bdp"
%opencl.event_t = type opaque
@vector_add.async_buffer = internal addrspace(2) global [4 x double] undef,
align 8
; Function Attrs: nounwind
define void @vector_add(double addrspace(3)* nocapture readonly %a, double
addrspace(3)* nocapture readonly %b, double addrspace(1)* %c, i32 %n) #0 {
%1 = tail call i32 @_Z13get_global_idj(i32 0) #2
%2 = mul i32 %1, %n
%3 = add i32 %2, %n
%4 = icmp ult i32 %2, %3
br i1 %4, label %.lr.ph3, label %._crit_edge
.loopexit: ; preds = %12, %.lr.ph3
%5 = icmp ult i32 %7, %3
br i1 %5, label %.lr.ph3, label %._crit_edge
.lr.ph3: ; preds = %0, %.loopexit
%i.02 = phi i32 [ %7, %.loopexit ], [ %2, %0 ]
%6 = tail call %opencl.event_t*
@_Z21async_work_group_copyPU7CLlocaldPKU8CLglobaldj9ocl_event(double
addrspace(2)* getelementptr inbounds ([4 x double], [4 x double] addrspace(2)*
@vector_add.async_buffer, i32 0, i32 0), double addrspac\
e(1)* %c, i32 4, %opencl.event_t* undef) #2
%7 = add i32 %i.02, 4
%8 = icmp ult i32 %i.02, -4
br i1 %8, label %.lr.ph, label %.loopexit
.lr.ph: ; preds = %.lr.ph3
%9 = getelementptr inbounds double, double addrspace(3)* %a, i32 %i.02
%10 = getelementptr inbounds double, double addrspace(3)* %b, i32 %i.02
%11 = getelementptr inbounds double, double addrspace(1)* %c, i32 %i.02
br label %12
; <label>:12 ; preds = %.lr.ph, %12
%j.01 = phi i32 [ %i.02, %.lr.ph ], [ %16, %12 ]
%13 = load double, double addrspace(3)* %9, align 8, !tbaa !10
%14 = load double, double addrspace(3)* %10, align 8, !tbaa !10
%15 = fadd double %13, %14
store double %15, double addrspace(1)* %11, align 8, !tbaa !10
%16 = add i32 %j.01, 1
%17 = icmp ult i32 %16, %7
br i1 %17, label %12, label %.loopexit
._crit_edge: ; preds = %.loopexit, %0
ret void
}
declare i32 @_Z13get_global_idj(i32) #1
declare %opencl.event_t*
@_Z21async_work_group_copyPU7CLlocaldPKU8CLglobaldj9ocl_event(double
addrspace(2)*, double addrspace(1)*, i32, %opencl.event_t*) #1
; Function Attrs: nounwind
define void @vector_sub(double addrspace(3)* nocapture readonly %a, double
addrspace(3)* nocapture readonly %b, double addrspace(1)* nocapture %c, i32 %n)
#0 {
%1 = tail call i32 @_Z13get_global_idj(i32 0) #2
%2 = mul i32 %1, %n
%3 = add i32 %2, %n
%4 = icmp ult i32 %2, %3
br i1 %4, label %.lr.ph, label %._crit_edge
.lr.ph: ; preds = %0
%5 = add i32 %1, 1
%6 = mul i32 %5, %n
br label %7
; <label>:7 ; preds = %7, %.lr.ph
%i.01 = phi i32 [ %2, %.lr.ph ], [ %14, %7 ]
%8 = getelementptr inbounds double, double addrspace(3)* %a, i32 %i.01
%9 = load double, double addrspace(3)* %8, align 8, !tbaa !10
%10 = getelementptr inbounds double, double addrspace(3)* %b, i32 %i.01
%11 = load double, double addrspace(3)* %10, align 8, !tbaa !10
%12 = fsub double %9, %11
%13 = getelementptr inbounds double, double addrspace(1)* %c, i32 %i.01
store double %12, double addrspace(1)* %13, align 8, !tbaa !10
%14 = add nuw i32 %i.01, 1
%exitcond = icmp eq i32 %14, %6
br i1 %exitcond, label %._crit_edge, label %7
._crit_edge: ; preds = %7, %0
ret void
}
; Function Attrs: nounwind
define void @vector_mult(double addrspace(3)* nocapture readonly %a, double
addrspace(3)* nocapture readonly %b, double addrspace(1)* nocapture %c, i32 %n)
#0 {
%1 = tail call i32 @_Z13get_global_idj(i32 0) #2
%2 = mul i32 %1, %n
%3 = add i32 %2, %n
%4 = icmp ult i32 %2, %3
br i1 %4, label %.lr.ph, label %._crit_edge
.lr.ph: ; preds = %0
%5 = add i32 %1, 1
%6 = mul i32 %5, %n
br label %7
; <label>:7 ; preds = %7, %.lr.ph
%i.01 = phi i32 [ %2, %.lr.ph ], [ %14, %7 ]
%8 = getelementptr inbounds double, double addrspace(3)* %a, i32 %i.01
%9 = load double, double addrspace(3)* %8, align 8, !tbaa !10
%10 = getelementptr inbounds double, double addrspace(3)* %b, i32 %i.01
%11 = load double, double addrspace(3)* %10, align 8, !tbaa !10
%12 = fmul double %9, %11
%13 = getelementptr inbounds double, double addrspace(1)* %c, i32 %i.01
store double %12, double addrspace(1)* %13, align 8, !tbaa !10
%14 = add nuw i32 %i.01, 1
%exitcond = icmp eq i32 %14, %6
br i1 %exitcond, label %._crit_edge, label %7
._crit_edge: ; preds = %7, %0
ret void
}
attributes #0 = { nounwind "disable-tail-calls"="false"
"less-precise-fpmad"="false"
"no-frame-pointer-elim"="false"
"no-infs-fp-math"="false"
"no-nans-fp-math"="false"
"stack-protector-buffer-size"="8"
"unsafe-fp-math"="false" "use-soft-\
float"="false" }
attributes #1 = { "disable-tail-calls"="false"
"less-precise-fpmad"="false"
"no-frame-pointer-elim"="false"
"no-infs-fp-math"="false"
"no-nans-fp-math"="false"
"stack-protector-buffer-size"="8"
"unsafe-fp-math"="false" "use-soft-float"="f\
alse" }
attributes #2 = { nobuiltin nounwind }
!opencl.kernels = !{!0, !7, !8}
!llvm.ident = !{!9}
!0 = !{void (double addrspace(3)*, double addrspace(3)*, double addrspace(1)*,
i32)* @vector_add, !1, !2, !3, !4, !5, !6}
!1 = !{!"kernel_arg_addr_space", i32 3, i32 3, i32 1, i32 0}
!2 = !{!"kernel_arg_access_qual", !"none",
!"none", !"none", !"none"}
!3 = !{!"kernel_arg_type", !"double*", !"double*",
!"double*", !"uint"}
!4 = !{!"kernel_arg_base_type", !"double*",
!"double*", !"double*", !"uint"}
!5 = !{!"kernel_arg_type_qual", !"const",
!"const", !"", !"const"}
!6 = !{!"kernel_arg_name", !"a", !"b",
!"c", !"n"}
!7 = !{void (double addrspace(3)*, double addrspace(3)*, double addrspace(1)*,
i32)* @vector_sub, !1, !2, !3, !4, !5, !6}
!8 = !{void (double addrspace(3)*, double addrspace(3)*, double addrspace(1)*,
i32)* @vector_mult, !1, !2, !3, !4, !5, !6}
!9 = !{!"Kalray clang version 3.7.0 (based on LLVM 3.7.0)"}
!10 = !{!11, !11, i64 0}
!11 = !{!"double", !12, i64 0}
!12 = !{!"omnipotent char", !13, i64 0}
!13 = !{!"Simple C/C++ TBAA"}
##################################################################################################################################
##################################################################################################################################
Mehdi Amini via llvm-dev
2016-May-24 15:22 UTC
[llvm-dev] BitcodeReader non explicit error
Hi,> On May 24, 2016, at 2:39 AM, Romaric Jodin via llvm-dev <llvm-dev at lists.llvm.org> wrote: > > Hi, > > I'm working on OpenCL and I'm using clang as compiler (based on clang 3.7.0). > I have a issue, I'm generating a bitcode file (that I can print before before the generation). But when I'm trying to read it again with clang, I have this issue: > > "error: Invalid record" > > How can I managed to know where it comes from?It's rather painful, usually I build a debug build and run in a debugger, and set a breakpoint in BitcodeReader::error. Then the stack trace should tell you what kind of record trigger the condition. From there `llvm-bcanalyzer -dump` may help. -- Mehdi> > Thank you, > Romaric > > > Here is what is print before the generation of the bitcode: > > ################################################################################################################################## > ################################################################################################################################## > > ; ModuleID = '/nfs/home/.cache/pocl/kcache/temp_sTRQB2.cl' > target datalayout = "e-p:32:32-i64:64-n8:16:32:64-S64" > target triple = "k1b---k1bdp" > > %opencl.event_t = type opaque > > @vector_add.async_buffer = internal addrspace(2) global [4 x double] undef, align 8 > > ; Function Attrs: nounwind > define void @vector_add(double addrspace(3)* nocapture readonly %a, double addrspace(3)* nocapture readonly %b, double addrspace(1)* %c, i32 %n) #0 { > %1 = tail call i32 @_Z13get_global_idj(i32 0) #2 > %2 = mul i32 %1, %n > %3 = add i32 %2, %n > %4 = icmp ult i32 %2, %3 > br i1 %4, label %.lr.ph3, label %._crit_edge > > .loopexit: ; preds = %12, %.lr.ph3 > %5 = icmp ult i32 %7, %3 > br i1 %5, label %.lr.ph3, label %._crit_edge > > .lr.ph3: ; preds = %0, %.loopexit > %i.02 = phi i32 [ %7, %.loopexit ], [ %2, %0 ] > %6 = tail call %opencl.event_t* @_Z21async_work_group_copyPU7CLlocaldPKU8CLglobaldj9ocl_event(double addrspace(2)* getelementptr inbounds ([4 x double], [4 x double] addrspace(2)* @vector_add.async_buffer, i32 0, i32 0), double addrspac\ > e(1)* %c, i32 4, %opencl.event_t* undef) #2 > %7 = add i32 %i.02, 4 > %8 = icmp ult i32 %i.02, -4 > br i1 %8, label %.lr.ph, label %.loopexit > > .lr.ph: ; preds = %.lr.ph3 > %9 = getelementptr inbounds double, double addrspace(3)* %a, i32 %i.02 > %10 = getelementptr inbounds double, double addrspace(3)* %b, i32 %i.02 > %11 = getelementptr inbounds double, double addrspace(1)* %c, i32 %i.02 > br label %12 > > ; <label>:12 ; preds = %.lr.ph, %12 > %j.01 = phi i32 [ %i.02, %.lr.ph ], [ %16, %12 ] > %13 = load double, double addrspace(3)* %9, align 8, !tbaa !10 > %14 = load double, double addrspace(3)* %10, align 8, !tbaa !10 > %15 = fadd double %13, %14 > store double %15, double addrspace(1)* %11, align 8, !tbaa !10 > %16 = add i32 %j.01, 1 > %17 = icmp ult i32 %16, %7 > br i1 %17, label %12, label %.loopexit > > ._crit_edge: ; preds = %.loopexit, %0 > ret void > } > > declare i32 @_Z13get_global_idj(i32) #1 > > declare %opencl.event_t* @_Z21async_work_group_copyPU7CLlocaldPKU8CLglobaldj9ocl_event(double addrspace(2)*, double addrspace(1)*, i32, %opencl.event_t*) #1 > > ; Function Attrs: nounwind > define void @vector_sub(double addrspace(3)* nocapture readonly %a, double addrspace(3)* nocapture readonly %b, double addrspace(1)* nocapture %c, i32 %n) #0 { > %1 = tail call i32 @_Z13get_global_idj(i32 0) #2 > %2 = mul i32 %1, %n > %3 = add i32 %2, %n > %4 = icmp ult i32 %2, %3 > br i1 %4, label %.lr.ph, label %._crit_edge > > .lr.ph: ; preds = %0 > %5 = add i32 %1, 1 > %6 = mul i32 %5, %n > br label %7 > > ; <label>:7 ; preds = %7, %.lr.ph > %i.01 = phi i32 [ %2, %.lr.ph ], [ %14, %7 ] > %8 = getelementptr inbounds double, double addrspace(3)* %a, i32 %i.01 > %9 = load double, double addrspace(3)* %8, align 8, !tbaa !10 > %10 = getelementptr inbounds double, double addrspace(3)* %b, i32 %i.01 > %11 = load double, double addrspace(3)* %10, align 8, !tbaa !10 > %12 = fsub double %9, %11 > %13 = getelementptr inbounds double, double addrspace(1)* %c, i32 %i.01 > store double %12, double addrspace(1)* %13, align 8, !tbaa !10 > %14 = add nuw i32 %i.01, 1 > %exitcond = icmp eq i32 %14, %6 > br i1 %exitcond, label %._crit_edge, label %7 > > ._crit_edge: ; preds = %7, %0 > ret void > } > > ; Function Attrs: nounwind > define void @vector_mult(double addrspace(3)* nocapture readonly %a, double addrspace(3)* nocapture readonly %b, double addrspace(1)* nocapture %c, i32 %n) #0 { > %1 = tail call i32 @_Z13get_global_idj(i32 0) #2 > %2 = mul i32 %1, %n > %3 = add i32 %2, %n > %4 = icmp ult i32 %2, %3 > br i1 %4, label %.lr.ph, label %._crit_edge > > .lr.ph: ; preds = %0 > %5 = add i32 %1, 1 > %6 = mul i32 %5, %n > br label %7 > > ; <label>:7 ; preds = %7, %.lr.ph > %i.01 = phi i32 [ %2, %.lr.ph ], [ %14, %7 ] > %8 = getelementptr inbounds double, double addrspace(3)* %a, i32 %i.01 > %9 = load double, double addrspace(3)* %8, align 8, !tbaa !10 > %10 = getelementptr inbounds double, double addrspace(3)* %b, i32 %i.01 > %11 = load double, double addrspace(3)* %10, align 8, !tbaa !10 > %12 = fmul double %9, %11 > %13 = getelementptr inbounds double, double addrspace(1)* %c, i32 %i.01 > store double %12, double addrspace(1)* %13, align 8, !tbaa !10 > %14 = add nuw i32 %i.01, 1 > %exitcond = icmp eq i32 %14, %6 > br i1 %exitcond, label %._crit_edge, label %7 > > ._crit_edge: ; preds = %7, %0 > ret void > } > > attributes #0 = { nounwind "disable-tail-calls"="false" "less-precise-fpmad"="false" "no-frame-pointer-elim"="false" "no-infs-fp-math"="false" "no-nans-fp-math"="false" "stack-protector-buffer-size"="8" "unsafe-fp-math"="false" "use-soft-\ > float"="false" } > attributes #1 = { "disable-tail-calls"="false" "less-precise-fpmad"="false" "no-frame-pointer-elim"="false" "no-infs-fp-math"="false" "no-nans-fp-math"="false" "stack-protector-buffer-size"="8" "unsafe-fp-math"="false" "use-soft-float"="f\ > alse" } > attributes #2 = { nobuiltin nounwind } > > !opencl.kernels = !{!0, !7, !8} > !llvm.ident = !{!9} > > !0 = !{void (double addrspace(3)*, double addrspace(3)*, double addrspace(1)*, i32)* @vector_add, !1, !2, !3, !4, !5, !6} > !1 = !{!"kernel_arg_addr_space", i32 3, i32 3, i32 1, i32 0} > !2 = !{!"kernel_arg_access_qual", !"none", !"none", !"none", !"none"} > !3 = !{!"kernel_arg_type", !"double*", !"double*", !"double*", !"uint"} > !4 = !{!"kernel_arg_base_type", !"double*", !"double*", !"double*", !"uint"} > !5 = !{!"kernel_arg_type_qual", !"const", !"const", !"", !"const"} > !6 = !{!"kernel_arg_name", !"a", !"b", !"c", !"n"} > !7 = !{void (double addrspace(3)*, double addrspace(3)*, double addrspace(1)*, i32)* @vector_sub, !1, !2, !3, !4, !5, !6} > !8 = !{void (double addrspace(3)*, double addrspace(3)*, double addrspace(1)*, i32)* @vector_mult, !1, !2, !3, !4, !5, !6} > !9 = !{!"Kalray clang version 3.7.0 (based on LLVM 3.7.0)"} > !10 = !{!11, !11, i64 0} > !11 = !{!"double", !12, i64 0} > !12 = !{!"omnipotent char", !13, i64 0} > !13 = !{!"Simple C/C++ TBAA"} > > ################################################################################################################################## > ################################################################################################################################## > _______________________________________________ > LLVM Developers mailing list > llvm-dev at lists.llvm.org > http://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-dev