> On Mar 18, 2016, at 1:37 PM, Rail Shafigulin <rail at
esenciatech.com> wrote:
>
>> I think you created a cycle, this is easy to do with SelectionDAG :)
>> Basically SelecitonDAG will iterate until it does not see anything to
change. So if you insert a transformation on a pattern A, that generates pattern
B, while you have another transformation that matches B and generates somehow A,
you run into an infinite loop.
>>
>>
>>
>>>
>>> I'm doing a lot of guess work in trying to understand what is
going on. I would really appreciate any help on this.
>>
>> Here is how I started with SelectionDAG:
>>
>> - small IR (bugpoint can help)
>> - the magic flag: -debug
>> - read the output of SelectionDAG debugging (especially with cycles)
>> - matching the log to source code
>> - single stepping in a debugger sometimes.
>
> Also: try to run your experiments with llc so you can easily tweak the
input IR to SelectionDAG.
>
> --
> Mehdi
>
>
>
> I ran a very simple test using llc and the following .ll file
> target datalayout =
"E-m:e-p:32:32-i64:32-f64:32-v64:32-v128:32-a:0:32-n32"
> target triple = "esencia"
>
> ; Function Attrs: nounwind uwtable
> define i32 @main() {
> entry:
> %z = alloca <4 x i32>
> %a = alloca <4 x i32>
> %b = alloca <4 x i32>
> %a.l = load <4 x i32>* %a
> %b.l = load <4 x i32>* %b
> %z.l = add <4 x i32> %a.l, %b.l
> store <4 x i32> %z.l, <4 x i32>* %z
> ret i32 0
> }
>
> The test ran successfully (by successfully I mean genration of correct
assembly for my target) without any modifications to the code, i.e. I didn't
have to add any
> setOperationAction(ISD::BUILD_VECTOR, MVT::v4i32, Expand);
> setOperationAction(ISD::EXTRACT_VECTOR_ELT, MVT::v4i32, Expand);
> setOperationAction(ISD::VECTOR_SHUFFLE, MVT::v4i32, Expand);
Yes this IR does not build or shuffle any vector. Try to write a function that
takes 8 ints and a pointer to a <4xi32>, builds two vectors with the 8
ints, sum them, and store the result to the pointer.
>
> In other words I left the code as is.
>
> However if I use a .c code and run it through clang, I don't see any
vector instructions. I'm puzzled. What am I doing wrong? There seems to be a
step missing, the one that will generate vectorized IR, but I can't seem to
find how to do it.
Try: clang -O3 -emit-llvm -S test.c
--
Mehdi
>
> Any help on this is really appreciated.
>
> --
> Rail Shafigulin
> Software Engineer
> Esencia Technologies
-------------- next part --------------
An HTML attachment was scrubbed...
URL:
<http://lists.llvm.org/pipermail/llvm-dev/attachments/20160318/70c74c9a/attachment.html>