llvm dev - May 2013 - [LLVMdev] VCOMISS instruction in X86

Hi,

I'm looking at scalar and packed instructions in X86.

  The instruction VCOMISS is scalar. May I remove
SSEPackedSingle/SSEPackedDouble domain from it?


  defm VUCOMISS : sse12_ord_cmp<0x2E, FR32, X86cmp, f32, f32mem, loadf32,
                                  "ucomiss", SSEPackedSingle>, TB,
VEX, VEX_LIG;
  defm VUCOMISD : sse12_ord_cmp<0x2E, FR64, X86cmp, f64, f64mem, loadf64,
                                  "ucomisd", SSEPackedDouble>, TB,
OpSize, VEX,
                                  VEX_LIG;
  let Pattern = []<dag> in {
    defm VCOMISS  : sse12_ord_cmp<0x2F, VR128, undef, v4f32, f128mem, load,
                                    "comiss", SSEPackedSingle>, TB,
VEX,
                                    VEX_LIG;
    defm VCOMISD  : sse12_ord_cmp<0x2F, VR128, undef, v2f64, f128mem, load,
                                    "comisd", SSEPackedDouble>, TB,
OpSize, VEX,
                                    VEX_LIG;

Thanks.

-        Elena



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Hey Elena,

On Mon, May 20, 2013 at 3:28 AM, Demikhovsky, Elena <
elena.demikhovsky at intel.com> wrote:
...
>    The instruction VCOMISS is scalar. May I remove
> SSEPackedSingle/SSEPackedDouble domain from it?
>
>
>   defm VUCOMISS : sse12_ord_cmp<0x2E, FR32, X86cmp, f32, f32mem,
loadf32,
>                                   "ucomiss", SSEPackedSingle>,
TB, VEX,
> VEX_LIG;
>
>
You're correct. These instructions should be in the generic domain.

In case you missed them, the same goes for the intrinsic and SSE variants
of these patterns.

-Cameron
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LGTM.  Thanks Elena.
 
On May 20, 2013, at 12:28 AM, "Demikhovsky, Elena"
<elena.demikhovsky at intel.com> wrote:
> Hi,
>  
> I’m looking at scalar and packed instructions in X86.
>  
>   The instruction VCOMISS is scalar. May I remove
SSEPackedSingle/SSEPackedDouble domain from it?
>  
>  
>   defm VUCOMISS : sse12_ord_cmp<0x2E, FR32, X86cmp, f32, f32mem,
loadf32,
>                                   "ucomiss", SSEPackedSingle>,
TB, VEX, VEX_LIG;
>   defm VUCOMISD : sse12_ord_cmp<0x2E, FR64, X86cmp, f64, f64mem,
loadf64,
>                                   "ucomisd", SSEPackedDouble>,
TB, OpSize, VEX,
>                                   VEX_LIG;
>   let Pattern = []<dag> in {
>     defm VCOMISS  : sse12_ord_cmp<0x2F, VR128, undef, v4f32, f128mem,
load,
>                                     "comiss",
SSEPackedSingle>, TB, VEX,
>                                     VEX_LIG;
>     defm VCOMISD  : sse12_ord_cmp<0x2F, VR128, undef, v2f64, f128mem,
load,
>                                     "comisd",
SSEPackedDouble>, TB, OpSize, VEX,
>                                     VEX_LIG;
>  
> Thanks.
>  
> Elena
>  
>  
>  
> ---------------------------------------------------------------------
> Intel Israel (74) Limited
> 
> This e-mail and any attachments may contain confidential material for
> the sole use of the intended recipient(s). Any review or distribution
> by others is strictly prohibited. If you are not the intended
> recipient, please contact the sender and delete all copies.
> 
> _______________________________________________
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