Displaying 5 results from an estimated 5 matches for "ssepackeddoubl".
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ssepackeddouble
2013 May 20
2
[LLVMdev] VCOMISS instruction in X86
Hi,
I'm looking at scalar and packed instructions in X86.
The instruction VCOMISS is scalar. May I remove SSEPackedSingle/SSEPackedDouble domain from it?
defm VUCOMISS : sse12_ord_cmp<0x2E, FR32, X86cmp, f32, f32mem, loadf32,
"ucomiss", SSEPackedSingle>, TB, VEX, VEX_LIG;
defm VUCOMISD : sse12_ord_cmp<0x2E, FR64, X86cmp, f64, f64mem, loadf64,...
2010 Mar 25
1
[LLVMdev] TSFlagsFields and TSFlagsShifts obsolete?
...trInfo TableGen class now.
This seems to work just fine:
class Instruction {
bits<32> TSFlags;
}
class Domain<bits<2> val> {
bits<2> Value = val;
}
def GenericDomain : Domain<0>;
def SSEPackedInt : Domain<1>;
def SSEPackedSingle : Domain<2>;
def SSEPackedDouble : Domain<3>;
class X86Instr<bits<8> opcod> : Instruction {
Domain ExeDomain = GenericDomain;
let TSFlags{0-7} = opcod;
let TSFlags{22-23} = ExeDomain.Value;
}
class PIInstr<bits<8> opcod> : X86Instr<opcod> {
let ExeDomain = SSEPackedInt;
}
def i1 : X8...
2016 Nov 28
2
RFC: code size reduction in X86 by replacing EVEX with VEX encoding
Hal, that’s a good point. There are more manually-maintained tables in the X86 backend that should probably be tablegened: the memory-folding tables and ReplaceableInstrs, to name a couple.
If you have ideas on how to get these auto-generated, please let us know.
From: llvm-dev [mailto:llvm-dev-bounces at lists.llvm.org] On Behalf Of Hal Finkel via llvm-dev
Sent: Wednesday, November 23, 2016
2014 Dec 26
2
[LLVMdev] X86 disassembler & assembler mismatch
...SSE_ALU_F32P>,
> PS;
> defm CMPPD : sse12_cmp_packed<VR128, f128mem, SSECC,
> int_x86_sse2_cmp_pd,
> "cmp${cc}pd\t{$src2, $dst|$dst,
> $src2}",
> "cmppd\t{$cc, $src2, $dst|$dst, $src2,
> $cc}",
> SSEPackedDouble, SSE_ALU_F64P>,
> PD;
> }
>
>
>
>
>
--
~Craig
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2014 Dec 26
2
[LLVMdev] X86 disassembler & assembler mismatch
hi,
some instructions mismatch between assembler & disassembler, like below.
it seems this happens with all SSECC related instructions?
thanks,
Jun
$ echo "cmpps xmm1, xmm2, 23" | ./Release+Asserts/bin/llvm-mc -assemble
-triple=x86_64 --output-asm-variant=1 -x86-asm-syntax=intel -show-encoding
.text
cmpps xmm1, xmm2, 23 # encoding: [0x0f,0xc2,0xca,0x17]
$