The project I am working on is to use the llvm toolchain for embedded CGRA
processors .
This however poses some restrictions on the block formation, because modulo
scheduling is applied in a later stage.
For this reason the idea was to create custom pragma's to generate metadata
and attach it to de branches of loops we wanted to map on a cgra module.
It is a lot similar to the loop parallell metadata discussed previously on
the mailing list.
I was able to made the metadata survive opt passes by extending LoopInfo to
remove/restore metadata as needed but once at the backend I get stuck.
I was thinking to add some custom fields to SDNode and afterwards MI but
that doesn't seem efficient (or a good idea) for many reason's.
For example not each instruction has metadata attached (in my case it's
only branching instructions inside a loop) and also during the
pattern matching nodes are replaced/combined/etc. and thus the data also
gets removed.
I need the information within the metadata to force if-conversion on
specific parts of the code for hyperblock formation.
2013/4/12 Eric Christopher <echristo at gmail.com>
> There's some support for metadata on MI and definitely on the IR. What
> do you have in mind and what are you doing?
>
> -eric
>
> On Fri, Apr 12, 2013 at 7:37 AM, Michael D'Hont <michael.dhont at
ugent.be>
> wrote:
> > Is there any way to work with the metadata inside llc? Or is there a
> > specific reason why metadata is not supported inside llc? Because as I
> see
> > it the metadata get's completely removed during instruction
selection.
> >
> > I would like to use the metadata to influence Loop Specific
> transformations
> > and if-conversion.
> >
> > Kind Regards
> > Michael D'hont
> >
> > _______________________________________________
> > LLVM Developers mailing list
> > LLVMdev at cs.uiuc.edu http://llvm.cs.uiuc.edu
> > http://lists.cs.uiuc.edu/mailman/listinfo/llvmdev
> >
>
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