search for: cgra

The project I am working on is to use the llvm toolchain for embedded CGRA processors . This however poses some restrictions on the block formation, because modulo scheduling is applied in a later stage. For this reason the idea was to create custom pragma's to generate metadata and attach it to de branches of loops we wanted to map on a cgra module. It is a lot simil...

Hi all, I am working on a CGRA backend (something like a 2D VLIW), and we also absolutely need predication. I extended the IfConversion pass to allow it to be executed multiple times and to predicate already predicated code. This is necessary to predicate code with nested conditional statements. At this point, we support or, and...

There's some support for metadata on MI and definitely on the IR. What do you have in mind and what are you doing? -eric On Fri, Apr 12, 2013 at 7:37 AM, Michael D'Hont <michael.dhont at ugent.be> wrote: > Is there any way to work with the metadata inside llc? Or is there a > specific reason why metadata is not supported inside llc? Because as I see > it the metadata

Is there any way to work with the metadata inside llc? Or is there a specific reason why metadata is not supported inside llc? Because as I see it the metadata get's completely removed during instruction selection. I would like to use the metadata to influence Loop Specific transformations and if-conversion. Kind Regards Michael D'hont -------------- next part -------------- An HTML

...anyone an idea how to use metadata present in the llvm ir to guide the if-conversion in llc (as metadata get's dropped during SelectionDAG) ? -Michael 2013/4/13 Michael D'Hont <michael.dhont at ugent.be> > The project I am working on is to use the llvm toolchain for embedded CGRA > processors . > This however poses some restrictions on the block formation, because > modulo scheduling is applied in a later stage. > For this reason the idea was to create custom pragma's to generate > metadata and attach it to de branches of loops we wanted to map on a cgra...

Hi al, At our lab we're using LLVM to optimize and compile code to be run on a CGRA processor, capable of executing parts of an application (mostly loops) very efficiently. Since we are talking about a VLIW processor, this code is generally being processed quite different than code for an OoO-processor would be (e.g. modulo scheduled). This makes that otherwise performance-enhanci...

On Wed, Oct 31, 2012 at 09:13:43PM +0100, Bjorn De Sutter wrote: > Hi all, > > I am working on a CGRA backend (something like a 2D VLIW), and we also absolutely need predication. I extended the IfConversion pass to allow it to be executed multiple times and to predicate already predicated code. This is necessary to predicate code with nested conditional statements. At this point, we support or, and...

Hi, I am trying to implement support for an if-conversion pass in a backend for the ADRES CGRA architecture. >From studying the existing IfConversion pass, I observed the following: - The PredicateInstruction method is meant to insert guards into conditional instructions. - This method assumes that one will be able to get the predicate from the conditional branch instruction on whi...

...tatements, or loops) and in what order. Will you be at the LLVM Euro Conference? We will have a lightning talk and poster on the topic there. Cheers, Ralf On 4/3/13 10:00 AM, Tim Besard wrote: > Hi al, > > At our lab we're using LLVM to optimize and compile code to be run on a > CGRA processor, capable of executing parts of an application (mostly > loops) very efficiently. Since we are talking about a VLIW processor, > this code is generally being processed quite different than code for an > OoO-processor would be (e.g. modulo scheduled). This makes that > otherwise...

Hi, I am working on a backend for a CGRA architecture with advanced predicate support (as on EPIC machines and as first used in the OpenIMPACT compiler). Until last month, the backend was working fine, but since the r161643 commit by stoklund, my backend doesn't work anymore. I think I noticed some related commits later on, and the as...

On Sep 18, 2012, at 1:45 PM, Bjorn De Sutter <bjorn.desutter at elis.ugent.be> wrote: > I am working on a backend for a CGRA architecture with advanced predicate support (as on EPIC machines and as first used in the OpenIMPACT compiler). Until last month, the backend was working fine, but since the r161643 commit by stoklund, my backend doesn't work anymore. I think I noticed some related commits later on, and the as...

We observed exact same problem, and I did put in place a mechanism to recognize and break such false dependencies right before pre-RA scheduler (in DAG->DAG lowering), but the immediate observed effect for our back end was performance reduction, since none of the current schedulers were capable of dealing with newly presented parallelism in BB (resulted in high reg pressure and

Hi Sergei, thanks for considering my question. We if-convert some code, such that the basic block looks as follows after if-conversion: ld char from A into R1 p1 = R1>255? (generate the predicate) p1 | R1 = 255 (conditional execution) st char R1 to A ld char from A+1 into R2 p2 = R2>255? (generate the predicate) p2 | R2 = 255 (conditional execution) store char R2 to A+1 The problem is