On Sep 7, 2012, at 4:46 PM, David Peixotto <dpeixott at codeaurora.org> wrote:>> Note that this won't work on big-endian targets where changing the >> vld1/vst1 element size actually changes the behavior of the instructions. > > Ok, so would it be best to put an explicit test for endianess in the code? > The td files already contain restrictions some for endianess for selecting > unaligned loads/stores. Probably the safest thing would be an explicit test, > but it sounds like there is not a real effort to support big-endian arm > targets anyway. > > I should be able to get the patch together and submit it for review next > week.I don't know if anyone actually uses arm processors in big-endian mode, but it shouldn't be too hard to conditionalize it. If it does turn out to be difficult for some reason, we should at least have comments to indicate where the endian assumptions are being made.
On 10 September 2012 06:44, Bob Wilson <bob.wilson at apple.com> wrote:> I don't know if anyone actually uses arm processors in big-endian mode, but it shouldn't be too hard to conditionalize it. If it does turn out to be difficult for some reason, we should at least have comments to indicate where the endian assumptions are being made.AFAICR, people used to use big-endian on non-NEON ARM cores in the 7TDMI/920 days, and if they still do so, they'll buy those chips. IMO, throwing a few comments would be enough for now. It's better to assume little enndian now, with a test case, than to assume big-endian is possible, without one. -- cheers, --renato http://systemcall.org/
David Peixotto
2012-Sep-10 16:37 UTC
[LLVMdev] Unaligned vector memory access for ARM/NEON.
Ok, I'll add an explicit test for endinaness before allowing the unaligned loads. It's easy to do and makes it very clear it will only work on little-endian systems. -- Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum, hosted by The Linux Foundation> -----Original Message----- > From: rengolin at gmail.com [mailto:rengolin at gmail.com] On Behalf Of > Renato Golin > Sent: Monday, September 10, 2012 12:07 AM > To: Bob Wilson > Cc: David Peixotto; Peter Couperus; Jakob Olesen; llvmdev at cs.uiuc.edu > Subject: Re: [LLVMdev] Unaligned vector memory access for ARM/NEON. > > On 10 September 2012 06:44, Bob Wilson <bob.wilson at apple.com> wrote: > > I don't know if anyone actually uses arm processors in big-endian mode, > but it shouldn't be too hard to conditionalize it. If it does turn out tobe> difficult for some reason, we should at least have comments to indicate > where the endian assumptions are being made. > > AFAICR, people used to use big-endian on non-NEON ARM cores in the > 7TDMI/920 days, and if they still do so, they'll buy those chips. > > IMO, throwing a few comments would be enough for now. It's better to > assume little enndian now, with a test case, than to assume big-endian is > possible, without one. > > -- > cheers, > --renato > > http://systemcall.org/
Possibly Parallel Threads
- [LLVMdev] Unaligned vector memory access for ARM/NEON.
- [LLVMdev] Unaligned vector memory access for ARM/NEON.
- [LLVMdev] Unaligned vector memory access for ARM/NEON.
- [LLVMdev] Unaligned vector memory access for ARM/NEON.
- [LLVMdev] Unaligned vector memory access for ARM/NEON.