aparna kotha
2011-May-25 19:08 UTC
[LLVMdev] Floating Point Register Allocation in X86 backend
Right. But there are 8 registers on the floating point stack from ST0 to ST7 and I think llvm is only using ST0 to ST6 in some code fragments. Could this be because of the assumption that X86::FP registers run from X86::FP0 to X86:FP6 ? --Aparna On Wed, May 25, 2011 at 2:28 PM, Jakob Stoklund Olesen <stoklund at 2pi.dk>wrote:> > On May 25, 2011, at 11:09 AM, aparna kotha wrote: > > > Hi Guys, > > > > I was working on some floating point intensive benchmarks and realize > that the floating point register allocation in llvm assumes that there are > only 7 floating point registers in X86, whereas the hardware has 8. > > > > Line number > > 00266 assert(Reg >= X86::FP0 && Reg <= X86::FP6 && "Expected FP > register!"); > > > > of X86FloatingPoint.cpp. > > > > Is there any reason for only counting from 0 to 6, when there are > actually 8 in hardware ? > > It has to do with the weird tricks that are needed to generate code for a > stack machine. > > > Is there an assumption somewhere else, that I am missing. > > Yes, the default cpu on Linux is i386 which doesn't have SSE support. > > Use SSE if you care about floating point performance. I think -mcpu=... is > all you need. > > /jakob > >-------------- next part -------------- An HTML attachment was scrubbed... URL: <http://lists.llvm.org/pipermail/llvm-dev/attachments/20110525/553e635d/attachment.html>
Jakob Stoklund Olesen
2011-May-25 19:47 UTC
[LLVMdev] Floating Point Register Allocation in X86 backend
On May 25, 2011, at 12:08 PM, aparna kotha wrote:> Right. But there are 8 registers on the floating point stack from ST0 to ST7 and I think llvm is only using ST0 to ST6 in some code fragments. Could this be because of the assumption that X86::FP registers run from X86::FP0 to X86:FP6 ?Yes. My guess it that the code converting from FP to ST registers sometimes needs the extra stack slot. /jakob
aparna kotha
2011-May-25 23:14 UTC
[LLVMdev] Floating Point Register Allocation in X86 backend
In case we want to have an unsafe register allocator that allocated FP0 to FP6 to include FP7 as well, where in the code should we add this? --Aparna On Wed, May 25, 2011 at 3:47 PM, Jakob Stoklund Olesen <stoklund at 2pi.dk>wrote:> > On May 25, 2011, at 12:08 PM, aparna kotha wrote: > > > Right. But there are 8 registers on the floating point stack from ST0 to > ST7 and I think llvm is only using ST0 to ST6 in some code fragments. Could > this be because of the assumption that X86::FP registers run from X86::FP0 > to X86:FP6 ? > > Yes. My guess it that the code converting from FP to ST registers sometimes > needs the extra stack slot. > > /jakob > >-------------- next part -------------- An HTML attachment was scrubbed... URL: <http://lists.llvm.org/pipermail/llvm-dev/attachments/20110525/1a5841d3/attachment.html>
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