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1a1841d30
2011 May 25
0
[LLVMdev] Floating Point Register Allocation in X86 backend
On May 25, 2011, at 12:08 PM, aparna kotha wrote:
> Right. But there are 8 registers on the floating point stack from ST0 to ST7 and I think llvm is only using ST0 to ST6 in some code fragments. Could this be because of the assumption that X86::FP registers run from X86::FP0 to X86:FP6 ?
Yes. My guess it that the code converting from FP to ST registers sometimes needs the extra stack slot.
2011 May 25
2
[LLVMdev] Floating Point Register Allocation in X86 backend
Right. But there are 8 registers on the floating point stack from ST0 to ST7
and I think llvm is only using ST0 to ST6 in some code fragments. Could this
be because of the assumption that X86::FP registers run from X86::FP0 to
X86:FP6 ?
--Aparna
On Wed, May 25, 2011 at 2:28 PM, Jakob Stoklund Olesen <stoklund at 2pi.dk>wrote:
>
> On May 25, 2011, at 11:09 AM, aparna kotha wrote: