search for: machineinstr

...vm2.1-check-debug.txt Here's an ARM test that cores: $ llvm-as < /home/emil/ll/llvm-2.1/test/CodeGen/ARM/2007-01-19-InfiniteLoop.ll | llc -march=arm -mattr=+v6,+vfp2 Segmentation fault (core dumped) $ gdb `which llc` llc.core [...] (gdb) where #0 0x0853d606 in llvm::ilist_traits<llvm::MachineInstr>::getNext ( N=0x5a5a5a5a) at MachineBasicBlock.h:37 #1 0x0854d807 in llvm::ilist_iterator<llvm::MachineInstr>::operator-- ( this=0xbfbfe880) at ilist:137 #2 0x085502c5 in std::__advance<llvm::ilist_iterator<llvm::MachineInstr>, int> (__i=@0xbfbfe880, __n=0) at stl...

I'm trying to clone a MachineInstr in the AsmPrinter::EmitInstruction, Here is the code: void EsenciaAsmPrinter::EmitInstruction(const MachineInstr *MI) { const MachineFunction *MF = MI->getParent()->getParent(); MachineInstr *CloneMI = MF->CloneMachineInstr(MI); ... ... } The problem is that MF is a const and CloneMa...

A question about how the memory of object in LLVM are managed. I dived in some source files but still don't have any idea how the memory of MachineInstr object are managed. It doesn't look like reference counting. I'm writing an instruction scheudling code, the new order of MachineInstr* in a MachineBasicBlock is stored in a "schedule". All MachineInstr* in MachineBasicBlock are first removed, and MachineInstr* are inserted back...

...on of induction variables, comparisons and branches. So when it came to implementing reduceLoopCount for our TargetInstrInfo, we found that we didn't have enough information from analyzeLoop to reduce the loops. Currently the signatures look like this: bool analyzeLoop(MachineLoop &L, MachineInstr *&IndVarInst, MachineInstr *&CmpInst) unsigned TargetInstrInfo::reduceLoopCount(MachineBasicBlock &MBB, MachineInstr *IndVar, MachineInstr &Cmp, SmallVectorImpl<MachineOperand> &Cond, SmallVectorImpl<MachineIn...

Hi, Recently, I am working on some information collection on the machine instruction (MachineInstr) level. But, sometimes, I need check the corresponding IR level instruction of the a machine instruction. When visiting a machine instruction which is a call (MachineInstr::isCall()), I need to check the arguments of this call site. I know that the CallSite class provides good facility for this wo...

I'm working on a custom VLIW (we call it Escala). At the moment I'm trying to implement EscalaAsmPrinter::EmitInstruction(const MachineInstr *MI). I'm trying to clone an instruction and this produces and error. Below are the code as well as error: void EscalaAsmPrinter::EmitInstruction(const MachineInstr *MI) { const MachineFunction *MF = MI->getParent()->getParent(); MachineInstr *CloneMI = MF->CloneMachineInstr(MI);...

On Tue, Sep 18, 2007 at 06:41:38PM +1000, Emil Mikulic wrote: > The "make check" produced: > === Summary === > > # of expected passes 2209 > # of unexpected failures 41 > # of expected failures 5 > gmake[1]: *** [check-local] Error 1 > gmake[1]: Leaving directory `/home/emil/ll/objdir-llvm/test' > gmake: ***

...that cores: > > $ llvm-as < /home/emil/ll/llvm-2.1/test/CodeGen/ARM/2007-01-19- > InfiniteLoop.ll | llc -march=arm -mattr=+v6,+vfp2 > Segmentation fault (core dumped) > > $ gdb `which llc` llc.core > [...] > (gdb) where > #0 0x0853d606 in llvm::ilist_traits<llvm::MachineInstr>::getNext ( > N=0x5a5a5a5a) at MachineBasicBlock.h:37 > #1 0x0854d807 in > llvm::ilist_iterator<llvm::MachineInstr>::operator-- ( > this=0xbfbfe880) at ilist:137 > #2 0x085502c5 in > std::__advance<llvm::ilist_iterator<llvm::MachineInstr>, int> &...

Hi, Thanks for your answer. I am looking for a map, and the data structure of this map is map<const Instruction *, vector<MachineInstr*> > In this map, its keyvalue is IR instruction pointer, and its second value is a container which is composed of MachineInstr lowering by its keyvalue. For example: IR Instruction %0 = load i32* getelementptr inbounds ([6 x i32]* @a, i32 0, i32 5), align 4, !tbaa !0 Two MachineInstrs lowe...

Hello. I am having difficulties to bundle MachineInstr instructions, before register allocation (RA). More exactly, I registered a simple pass in addPreRegAlloc() that is trying to create bundles. I see that it is written at http://llvm.org/docs/CodeGenerator.html#machineinstr-bundles: <<Packing / bundling of MachineInstr’s sh...

Hi all, I have learned about LLVM backend passes. LLVM IR changes its format four times until final output assembly/object through SelectionDAG, MachineInstr, MCInst. MCInst format layer seems to be called as "MC layer" officially. What about MachineInstr format layer? It seems to be called as "MI layer", is it officially? Please tell me there is good name for representing MachineInstr layer. Thanks, Masahiro. -------------- next p...

...f bytes to be generated at a specific alignment. The goal is to ensure that sequences of bytes used to label valid targets of an indirect branch (e.g., a return instruction) do not appear at a given alignment anywhere in a program other than for where I inserted them explicitly. It looks like MachineInstr has a method for finding the length of the instruction's binary encoding, but I didn't see a method for finding the exact bytes that would be emitted from the MachineInstr. Is there a way to do this in the MachineFunctionPass/MachineInstr infrastructure, or do I need to use something l...

I keep getting this error upon building: > Linking CXX executable ../../bin/opt > ../../lib/libLLVMTarget.so: error: undefined reference to > 'llvm::TargetInstrInfo::getNumMicroOps(llvm::InstrItineraryData > const*, llvm::MachineInstr const*) const' > ../../lib/libLLVMTarget.so: error: undefined reference to > 'llvm::TargetInstrInfo::getInstrLatency(llvm::InstrItineraryData > const*, llvm::MachineInstr const*, unsigned int*) const' > ../../lib/libLLVMTarget.so: error: undefined reference to > 'l...

Hi all, Two days ago MachineBasicBlock got ilistified. What does this mean and how does it affect you? Read on. MachineBasicBlock used to have a std::vector<MachineInstr*> to represent the instructions it constisted of. This representation has the following problems: 1) O(n) insertions/removals to/from anywhere but the end of a basic block (removals are very comomn in peephole optimizers and insertions in register allocators) 2) After an insertion...

...at I don't know how to fix. Could someone tell me which steps should I take in order to correctly fold memory operands? The code that I am using is: const TargetMachine & target_machine = this->machine_function->getTarget(); const MRegisterInfo *ri = target_machine.getRegisterInfo(); MachineInstr * fmi = ri->foldMemoryOperand(mi, u, slot); if(fmi) { numFolded++; MachineBasicBlock * mbb = mi->getParent(); this->vrm->virtFolded(v_reg, mi, u, fmi); //std::cerr << "Folding " << NeatPrint::mi2string(*mi, *this->machine_function) << "\n&...

...t it cannot cover everything. Specifically we will *not* look into improving TableGen or reuse InstCombine (see “ Proposed Approach” for the rational). Please let me know if you see any issue with that. There is also basic ground work needed to prepare for Global ISel and I need to extend the core MachineInstr-level APIs as explained during the talk. For this, I prepared sketches of patches to illustrate them and describe the details in the “Implications” section below. Please have a look at the patches to have a better idea of the expected impact. If there is anything else you want to discuss related t...

Chris Lattner wrote: > There are a couple of ways to do this. Is your scheduler a prepass > scheduler (before regalloc) or a post-pass scheduler (after regalloc)? it is a post-pass scheduler, which operates on MachineInstrs. we need to run it after register allocation to hide latencies of spill code, prolog, and epilog. > If you want to extract maximal parallelism, I assume you want a prepass > scheduler. In that case, you should look into the SelectionDAG based > schedulers, which do have alias informatio...

...specific alignment. > The goal is to ensure that sequences of bytes used to label valid > targets of an indirect branch (e.g., a return instruction) do not > appear at a given alignment anywhere in a program other than for where > I inserted them explicitly. > > It looks like MachineInstr has a method for finding the length of the > instruction's binary encoding, but I didn't see a method for finding > the exact bytes that would be emitted from the MachineInstr. Is there > a way to do this in the MachineFunctionPass/MachineInstr > infrastructure, or do I nee...

I'm getting to the point where I want to contribute some more MachineInstr comment support for things like spills. As we've discussed before, we don't have all of the information available in AsmPrinter to synthesize the kind of comments that can be helpful for debugging performance issues with register allocators (our primary use for these kinds of comments). I...

...J. Driftmeyer <mjd at reanimality.com> wrote: > I keep getting this error upon building: > >> Linking CXX executable ../../bin/opt >> ../../lib/libLLVMTarget.so: error: undefined reference to 'llvm::TargetInstrInfo::getNumMicroOps(llvm::InstrItineraryData const*, llvm::MachineInstr const*) const' >> ../../lib/libLLVMTarget.so: error: undefined reference to 'llvm::TargetInstrInfo::getInstrLatency(llvm::InstrItineraryData const*, llvm::MachineInstr const*, unsigned int*) const' >> ../../lib/libLLVMTarget.so: error: undefined reference to 'llvm::Targe...