Displaying 2 results from an estimated 2 matches for "machinst".
Did you mean:
machins
2012 Mar 30
1
[LLVMdev] load instruction memory operands value null
...want to check the pointer alias behavior. I am getting this by considering the memoperands for the load instruction.
For "load instruction", Machine Instruction dumps as below:
vr12<def> = LD_Iri %vr2<kill>, 0; mem:LD4[<unknown>]
I checked for memoperands for this MachInst, which are not empty, as "has_empty()" returns false. When I check "Value *", pointed by memoperands_begin() and memoperands_end(), i get NULL value. Thus, I don't the the memory pointer.
What can be probable reasons for this behavior? or is this behavior expected?
I ha...
2011 Jan 25
1
[LLVMdev] Trouble with virtual registers
...ith virtual registers/register allocation in my
back-end. Basically the FastRegAlloc pass is generating calls to
storeToStackSlot and loadFromStackSlot, in which we build new machine
instructions, which are then _not_ processed by the reg allocator. I
understand that BuildMI is changing the list of MachInst. that the allocator
is iterating over, but we need to have a new virtual register as part of the
stack store process since we don't have indirect adressing. Should we be
creating a physical register directly somehow, or can we perhaps signal to
the allocator that the basic block's contents...