search for: frameidx

...598b8327ef239bc/lib/Target/Picoblaze /******************************/ void PicoblazeInstrInfo::storeRegToStackSlot(MachineBasicBlock &MBB, MachineBasicBlock::iterator MI, unsigned SrcReg, bool isKill, int FrameIdx, const TargetRegisterClass *RC, const TargetRegisterInfo *TRI ) const { PR_FUNCTION(); DebugLoc DL; if (MI != MBB.end()) DL = MI->getDebugLoc(); MachineFunction &MF = *MBB.getPa...

Hi llvmdev, I'm trying to figure how llvm remembers stack slots allotted to callee saved registers on x86. In particular, llvm pushes registers in decreasing order of FrameIdxs [1], so the offsets they get (as returned by MFI->getObjectOffset) don't directly correspond to their actual stack locations. In X86FrameLowering's emitCalleeSavedFrameMoves, when emitting DWARF information, this discrepancy gets fixed up by subtracting the offset reported by MFI->g...

...Dri instruction is transformed into a copy-add pair in eliminateFrameIndex. void OurTargetInstrInfo::storeRegToStackSlot(MachineBasicBlock &MBB, MachineBasicBlock::iterator MI, unsigned SrcReg, bool isKill, int FrameIdx, const TargetRegisterClass *RC, const llvm::TargetRegisterInfo*) const { DebugLoc DL; if (MI != MBB.end()) DL = MI->getDebugLoc(); MachineFunction &MF = *MBB.getParent(); MachineFrameInfo &MFI = *...

...n 31.5.2014 2:04, Pasi Parviainen wrote: > On 28.5.2014 2:57, Sanjoy Das wrote: >> Hi llvmdev, >> >> I'm trying to figure how llvm remembers stack slots allotted to callee >> saved registers on x86. In particular, llvm pushes registers in >> decreasing order of FrameIdxs [1], so the offsets they get (as >> returned by MFI->getObjectOffset) don't directly correspond to their >> actual stack locations. In X86FrameLowering's >> emitCalleeSavedFrameMoves, when emitting DWARF information, this >> discrepancy gets fixed up by subtract...

Chris Lattner wrote: > On Sat, 13 May 2006, Vladimir Prus wrote: >> in LLVM CVS the afore-mentioned function has 'const TargetRegisterClass*' >> parameter, that is not documented. >> >> Can somebody explain what does it mean? > > Basically, it gives the target more information about the spill. In > particular, it specifies the register class to use

The patch is in http://lists.cs.uiuc.edu/pipermail/llvm-commits/Week-of-Mon-20080421/061548.html . Okay to commit :) On Thu, Apr 24, 2008 at 7:35 PM, Arnold Schwaighofer <arnold.schwaighofer at gmail.com> wrote: > Another round :) > > I'll post the patch to llvm-commits cause i guess people might get > annoyed by my series of patches :). > > On Tue, Apr 22, 2008 at

Hello everybody, hi Evan, this patch changes the lowering of arguments for tail call optimized calls. Before arguments that could be overwritten by each other were explicitly lowered to a stack slot, not giving the register allocator a chance to optimize. Now a sequence of copyto/copyfrom virtual registers ensures that arguments are loaded in (virtual) registers before they are lowered to the

Another round :) I'll post the patch to llvm-commits cause i guess people might get annoyed by my series of patches :). On Tue, Apr 22, 2008 at 10:34 PM, Evan Cheng <evan.cheng at apple.com> wrote: . >> +PPCTargetLowering::IsEligibleForTailCallOptimization(SDOperand Call, >> ... > That's fine. Please break it into two parts and move the target > independent part

...http://pastie.org/8490604 The problem is in PEI::calculateCalleeSavedRegisters: // We may not be able to satisfy the desired alignment specification of // the TargetRegisterClass if the stack alignment is smaller. Use the // min. Align = std::min(Align, StackAlign); FrameIdx = MFI->CreateStackObject(RC->getSize(), Align, true); This will create unaligned load/store for a callee-saved 128-bit register on the frame slot because StackAlign is 4. Adding a check for stack realignable or putting all the 128-bit registers as caller-save will fix the problem. if (!...

Hello, after some time I'm trying to build my code with the current CVS of LLVM, and have a problem. The mentioned file, around line 184, contains: if (FixedSlot == FixedSpillSlots+NumFixedSpillSlots) { // Nope, just spill it anywhere convenient. FrameIdx = FFI->CreateStackObject(RegInfo->getSpillSize(Reg)/8, RegInfo->getSpillAlignment(Reg)/8); } else { // Spill it to the stack where we must. FrameIdx = FFI->CreateFixedObject(RegInfo->getSpillSize(Reg)/8,...

...> > > > > > > > // We may not be able to satisfy the desired alignment > > specification > > of > > // the TargetRegisterClass if the stack alignment is smaller. Use > > the > > // min. > > Align = std::min(Align, StackAlign); > > FrameIdx = MFI->CreateStackObject(RC->getSize(), Align, true); > > > > > > This will create unaligned load/store for a callee-saved 128-bit > > register on the frame slot because StackAlign is 4. > > > > > > Adding a check for stack realignable or putting...

...> > The problem is in PEI::calculateCalleeSavedRegisters: > > > > // We may not be able to satisfy the desired alignment specification > of > // the TargetRegisterClass if the stack alignment is smaller. Use the > // min. > Align = std::min(Align, StackAlign); > FrameIdx = MFI->CreateStackObject(RC->getSize(), Align, true); > > > This will create unaligned load/store for a callee-saved 128-bit > register on the frame slot because StackAlign is 4. > > > Adding a check for stack realignable or putting all the 128-bit > registers as c...

...t; > // We may not be able to satisfy the desired alignment > > > specification > > > of > > > // the TargetRegisterClass if the stack alignment is smaller. Use > > > the > > > // min. > > > Align = std::min(Align, StackAlign); > > > FrameIdx = MFI->CreateStackObject(RC->getSize(), Align, true); > > > > > > > > > This will create unaligned load/store for a callee-saved 128-bit > > > register on the frame slot because StackAlign is 4. > > > > > > > > > Adding a check fo...

...t; > // We may not be able to satisfy the desired alignment > > > specification > > > of > > > // the TargetRegisterClass if the stack alignment is smaller. Use > > > the > > > // min. > > > Align = std::min(Align, StackAlign); > > > FrameIdx = MFI->CreateStackObject(RC->getSize(), Align, true); > > > > > > > > > This will create unaligned load/store for a callee-saved 128-bit > > > register on the frame slot because StackAlign is 4. > > > > > > > > > Adding a chec...