llvm dev - Feb 2010 - [LLVMdev] converting an unconditional into a conditional branch

Hi,

I'm learning to use the llvm API, but I got a question for which I
haven't
found a good answer yet:

What is the best way to turn an unconditional branch into a conditional 
branch? All I want to do is add two more operands, a successor and a 
condition. But no matter how I try to do this any one of 
setCondition()/setOperand()/setSuccessor() causes an assertion like these:

Cannot set condition of unconditional branch!
Successor # out of range for Branch!
setOperand() out of range!

Can this only be done by completely replacing the unconditional branch 
instruction with a new, conditional one or is there a method with which I can 
implicitly turn an unconditional branch into a conditional one by adding a 
condition and a successor?

I'd be glad if anyone could give me a hint on how to do this most elegantly.

Regards,
 Florian

On Mon, Feb 8, 2010 at 3:49 PM, Florian Merz <florian.merz at kit.edu>
wrote:
> Hi,
>
> I'm learning to use the llvm API, but I got a question for which I
haven't
> found a good answer yet:
>
> What is the best way to turn an unconditional branch into a conditional
> branch? All I want to do is add two more operands, a successor and a
> condition. But no matter how I try to do this any one of
> setCondition()/setOperand()/setSuccessor() causes an assertion like these:
>
> Cannot set condition of unconditional branch!
> Successor # out of range for Branch!
> setOperand() out of range!
>
> Can this only be done by completely replacing the unconditional branch
> instruction with a new, conditional one or is there a method with which I
can
> implicitly turn an unconditional branch into a conditional one by adding a
> condition and a successor?
Replacing the unconditional branch instruction is appropriate here.
-
Devang
>
> I'd be glad if anyone could give me a hint on how to do this most
elegantly.
>
> Regards,
>  Florian
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