llvm dev - Sep 2008 - [LLVMdev] Instruction MVT::ValueTypes

Is there an easy way to get the MVT::ValueType of a MachineInstruction 
MachineOperand?  For example, the register operand of an x86 MOVAPD should
have an MVT::ValueType of v2f64.  A MOVAPS register operand should have an
MVT::ValueType of v4f32.

So given a MachineInstruction and its MachineOperands is there some easy way
to derive this information?  I don't see anything in TargetInstrInfo that 
would help.

                                                 -Dave

On Sep 2, 2008, at 10:42 AM, David Greene wrote:
> Is there an easy way to get the MVT::ValueType of a MachineInstruction
> MachineOperand?  For example, the register operand of an x86 MOVAPD  
> should
> have an MVT::ValueType of v2f64.  A MOVAPS register operand should  
> have an
> MVT::ValueType of v4f32.
The short answer is no. A op of a number of different VTs can map to  
the same instruction. However, given a register class you can get to  
the list of VTs that map to it. Take a look at TargetRegisterDesc.

Evan
>
>
> So given a MachineInstruction and its MachineOperands is there some  
> easy way
> to derive this information?  I don't see anything in TargetInstrInfo  
> that
> would help.
>
>                                                 -Dave
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On Tuesday 02 September 2008 16:47, Evan Cheng wrote:
> On Sep 2, 2008, at 10:42 AM, David Greene wrote:
> > Is there an easy way to get the MVT::ValueType of a MachineInstruction
> > MachineOperand?  For example, the register operand of an x86 MOVAPD
> > should
> > have an MVT::ValueType of v2f64.  A MOVAPS register operand should
> > have an
> > MVT::ValueType of v4f32.
>
> The short answer is no. A op of a number of different VTs can map to
> the same instruction. 
In general, that may be true, but for most instructions isn't it 1:1?  What 
are some examples where it isn't 1:1?  The vector processor needs to
know how the data in the register is organized to compute the operation, after 
all.

Thinking about MOVAPS / MOVAPD I suppose one could argue that it's
perfectly legal to do a MOVAPD on a vector register that contains 8-bit data.
It's just bits, after all, but there is a "preference" to what
should be in
the register for performance reasons.  It's not good to mix-and-match MOVAPD
and MOVAPS on the same data.
> However, given a register class you can get to 
> the list of VTs that map to it. Take a look at TargetRegisterDesc.
Tha'ts usually not enough.  For example, in an SSE operand you want to know 
the type of data contained in it (32-bit [or less] or 64-bit) to generate 
optimal code.  Just knowing that it's a 128-bit vector register that can
hold
8-, 16-, 32- or 64-bit data is not enough.

Getting this information into the TargetInstrInfo / TargetOperandInfo would
take a fair amount of TableGen and .td file hacking, I would think.  Right?

                                                        -Dave