search for: machineinstruction

Displaying 20 results from an estimated 168 matches for "machineinstruction".

2013 May 30
2
[LLVMdev] How to associate extra comments to a MachineInstruction ?
> From: Eric Christopher > Subject: Re: [LLVMdev] How to associate extra comments to a > MachineInstruction ? > > Should be spelled like this yes? > > Asm->OutStreamer.AddComment("foo") > Asm->EmitFoo(); > > -eric That should work at the moment that you are emitting the instructions. But what would you do when you are manipulating a MachineBasicBlock and want t...
2013 May 30
2
[LLVMdev] How to associate extra comments to a MachineInstruction ?
Hi, is there a convenient way to associate/add a comment to a MachineInstruction, so that in the produced assembly file, the comment is added next to the instruction ? Greetings, Jeroen Dobbelaere
2013 May 30
0
[LLVMdev] How to associate extra comments to a MachineInstruction ?
On Thu, May 30, 2013 at 2:16 PM, Jeroen Dobbelaere <Jeroen.Dobbelaere at synopsys.com> wrote: >> From: Eric Christopher >> Subject: Re: [LLVMdev] How to associate extra comments to a >> MachineInstruction ? >> >> Should be spelled like this yes? >> >> Asm->OutStreamer.AddComment("foo") >> Asm->EmitFoo(); >> >> -eric > > > That should work at the moment that you are emitting the instructions. > Yep. > But what would you do wh...
2013 May 30
0
[LLVMdev] How to associate extra comments to a MachineInstruction ?
Should be spelled like this yes? Asm->OutStreamer.AddComment("foo") Asm->EmitFoo(); -eric On Thu, May 30, 2013 at 1:44 PM, Jeroen Dobbelaere <Jeroen.Dobbelaere at synopsys.com> wrote: > Hi, > > is there a convenient way to associate/add a comment to a MachineInstruction, so that > in the produced assembly file, the comment is added next to the instruction ? > > Greetings, > > Jeroen Dobbelaere > > > _______________________________________________ > LLVM Developers mailing list > LLVMdev at cs.uiuc.edu http://llvm.cs.uiuc.edu &...
2011 Oct 31
2
[LLVMdev] Adding a custom GC safe point creation phase
...e it's difficult for a front-end to pass custom information to the GC framework. And I think metadata could help us in this situation. Ideally, I'd like to get to a point where we can write: 15 = load %MyPointer* %2 !safepoint And the GCStrategy would find this metadata information in the MachineInstruction (because the safe points are created based on MachineInstruction). This solution looks very much like the !nontemporal metadata. Unfortunately, it looks like metadata are not passed down to MachineInstruction. How could we achieve that? Should we write custom code in the Instruction -> MachineI...
2011 Nov 01
0
[LLVMdev] Adding a custom GC safe point creation phase
...for a front-end to pass custom information to the GC framework. And I think metadata could help us in this situation. Ideally, I'd like to get to a point where we can write: > > 15 = load %MyPointer* %2 !safepoint > > And the GCStrategy would find this metadata information in the MachineInstruction (because the safe points are created based on MachineInstruction). This solution looks very much like the !nontemporal metadata. > > Unfortunately, it looks like metadata are not passed down to MachineInstruction. How could we achieve that? Should we write custom code in the Instruction -&gt...
2018 Feb 14
1
Adding comments to 'MachineInstruction'
...6 > Date: Mon, 5 Feb 2018 19:31:58 -0000 > From: "Martin J. O'Riordan via llvm-dev" <llvm-dev at lists.llvm.org> > To: <mbraun at apple.com> > Cc: 'LLVM Developers' <llvm-dev at lists.llvm.org> > Subject: Re: [llvm-dev] Adding comments to 'MachineInstruction' > Message-ID: <006701d39eb7$fda8ac90$f8fa05b0$@theheart.ie> > Content-Type: text/plain; charset="utf-8" > > Thanks Matthias, > > > > It looks like the comments that do exist are emitted are pre-cooked and depend on some other attribute of the MI or the...
2018 Feb 05
0
Adding comments to 'MachineInstruction'
There is no generic mechanism as far as I know. You can look at AsmPrinter.cpp/emitComments() to see what situations trigger comments at the moment. - Matthias > On Feb 3, 2018, at 4:40 AM, Martin J. O'Riordan via llvm-dev <llvm-dev at lists.llvm.org> wrote: > > When I am constructing sequences of instructions during custom lowering, I would like to be able to also add a
2018 Feb 03
2
Adding comments to 'MachineInstruction'
When I am constructing sequences of instructions during custom lowering, I would like to be able to also add a comment that appears in the generated assembly with '-S -fverbose-asm'. There is a large set of 'add*' functions to attach additional information to the MI, but I don't see one for adding comments. Is there a method I can call to attach an arbitrary string
2011 Sep 29
1
[LLVMdev] Marking machineinstructions that are spills generated by register allocation
Our TCE backend (which is not in the official llvm repo) benefits greatly from information that which memory load/store is a spill generated by register allocation. These spill memory operation can never alias with other memory operations, and our own instruction scheduler can optimize much better with better alias information. I have created a code which adds marking these spill
2008 Sep 02
2
[LLVMdev] Instruction MVT::ValueTypes
Is there an easy way to get the MVT::ValueType of a MachineInstruction MachineOperand? For example, the register operand of an x86 MOVAPD should have an MVT::ValueType of v2f64. A MOVAPS register operand should have an MVT::ValueType of v4f32. So given a MachineInstruction and its MachineOperands is there some easy way to derive this information? I don't see...
2005 Mar 18
2
[LLVMdev] new IA64 backend
...o I'll swat these two bugs pretty soon. > Namely, I am working on some varargs changes > that may or may not be applicable to you. Hmm. :) >> - No instruction scheduling/bundling of any sort > > So this one needs to be coordinated. Next week, I might see about > adding MachineInstruction support to the SelectionDAG so you can load up > a DAG post-ISel and then spit it back out scheduled. That would be much appreciated, particularly if it means that we can have scheduled MachineInstructions living alongside DAGs in such a way that changing the DAG (adding/removing a couple of...
2009 Jan 20
2
[LLVMdev] HazardRecognizer and RegisterAllocation
On Monday 19 January 2009 18:21, Dan Gohman wrote: > > Dan, how does the scheduler handle memory dependence? I'm working on > > something that requires memory dependence information for > > MachineInstructions. > > At the moment, it knows simple things, like constant pool loads > don't have dependencies, and references to distinct stack slots are > independent, and so on. Ok. > I have a few ideas for how more precise memory dependencies might be > achieved. > > We have Mach...
2004 Feb 20
1
[LLVMdev] Changes in MachineInstruction/Peephole Optimizer?
Hi all, The register allocator that I implemented is failing in the LLVM cvs version, but not in LLVM 1.1. The generated code fails a check in the x86 peephole optimizer: llc: PeepholeOptimizer.cpp:128: bool <unnamed>::PH::PeepholeOptimize(llvm::Machi neBasicBlock&, llvm::ilist_iterator<llvm::MachineInstr>&): Assertion `MI->getNum Operands() == 2 && "These
2009 Jan 19
2
[LLVMdev] HazardRecognizer and RegisterAllocation
...em. We don't currently > have any targets in-tree that require no-ops, so it may not address all > your needs out of the box, but patches are welcome :-). Dan, how does the scheduler handle memory dependence? I'm working on something that requires memory dependence information for MachineInstructions. -Dave
2011 Nov 01
2
[LLVMdev] Adding a custom GC safe point creation phase
...andard code need for adding a post call safe point; } } } So it really looks like what we already have, except this special trick about checking the debug location. Piggy backing on the debug location is easy and works for me because: 1) Debug locations are passed from LLVM Instructions to MachineInstruction 2) I don't have column numbers in my front-end. The instructions that get this special marker on the debug location are instructions that may trigger a segmentation fault. Because I enter a signal handler, that may invoke a collection, I need to know the roots at the faulting instruction's...
2011 Jun 18
0
[LLVMdev] Custom Static Scheduling
...this > possible by starting to modify the SelectionDAG Files ? > Or can i even build a "standalone" custom scheduler? > Thank you very much for any tipps. You might be interested to look at our recent scheduler generalization project in TCE [1]. In our case we convert from LLVM MachineInstructions to the IR of our custom scheduler (CFG+DDG) which is then converted back to fresh MachineBasicBlocks/MachineInstructions for assembly generation in the LLVM side. The first (non-TTA) target we are experimenting with is the Cell SPU. Eventually we hope to see the LLVM code generation framework imp...
2011 Jun 18
2
[LLVMdev] Custom Static Scheduling
Hi there, i created a Function Pass to retrieve the Control/Data Flow Graph from a simple program, now i would like to statically schedule the Instructions. Is this possible by starting to modify the SelectionDAG Files ? Or can i even build a "standalone" custom scheduler? Thank you very much for any tipps. Ben
2009 Jun 22
4
[LLVMdev] Adding safe-point code generation
...d there would stick around in the IR after the machine code was emitted, and if the function were JITted again, we'd get duplicate safe points. Another way to do it might be to add a MachineFunction pass next to createGCMachineCodeAnalysisPass() (or instead of it), which could emit appropriate MachineInstructions to implement the safe point. This, of course, forces safe points to be written in MachineInstructions instead of IR instructions, which isn't ideal. Another way might be to run a pass over the IR inserting llvm.safepoint() calls, which could be implemented as a function in the module. Then we...
2005 Mar 18
0
[LLVMdev] new IA64 backend
On Fri, 18 Mar 2005, Duraid Madina wrote: >>> - No instruction scheduling/bundling of any sort >> >> So this one needs to be coordinated. Next week, I might see about >> adding MachineInstruction support to the SelectionDAG so you can load up >> a DAG post-ISel and then spit it back out scheduled. > > That would be much appreciated, particularly if it means that we can have > scheduled MachineInstructions living alongside DAGs in such a way that > changing the DAG (addin...