My target supports only 8-bit arithmetic, hence I specified it to exapand ADD for i32 and i16. llc fails at the following place in LegalizeDAG.cpp: assert(MVT::isVector(Node->getValueType(0)) && "Cannot expand this binary operator!"); // Expand the operation into a bunch of nasty scalar code. Result = LegalizeOp(UnrollVectorOp(Op)); I don't understand why it is treating i32 and i16 as vector types. I think it was working fine in llvm2.1 Any help is welcome. Thanks, Sanjiv -------------- next part -------------- An HTML attachment was scrubbed... URL: <http://lists.llvm.org/pipermail/llvm-dev/attachments/20080221/7d9f38c7/attachment.html>
> My target supports only 8-bit arithmetic, hence I specified it to exapand > ADD for i32 and i16.I don't have any help to offer for your precise problem, but the new type legalization infrastructure which is being prepared (for 2.3 hopefully) should be much better at handling this kind of thing. Best wishes, Duncan.
Do a Node->dump(&DAG). What does Node look like? If all else fails, do a "make clean; make" just to make sure nothing is out of sync. Evan On Feb 21, 2008, at 5:29 AM, Sanjiv Gupta wrote:> My target supports only 8-bit arithmetic, hence I specified it to > exapand ADD for i32 and i16. > > llc fails at the following place in LegalizeDAG.cpp: > > assert(MVT::isVector(Node->getValueType(0)) && > "Cannot expand this binary operator!"); > // Expand the operation into a bunch of nasty scalar code. > Result = LegalizeOp(UnrollVectorOp(Op)); > > I don't understand why it is treating i32 and i16 as vector types. > I think it was working fine in llvm2.1 > > Any help is welcome. > > Thanks, > Sanjiv > > _______________________________________________ > LLVM Developers mailing list > LLVMdev at cs.uiuc.edu http://llvm.cs.uiuc.edu > http://lists.cs.uiuc.edu/mailman/listinfo/llvmdev
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