search for: legalizedag

Displaying 20 results from an estimated 207 matches for "legalizedag".

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2012 Jun 27
2
[LLVMdev] [NVPTX] Backend failure in LegalizeDAG due to unimplemented expand in target lowering
...dmikushin/sandbox/bin/llc...done. (gdb) r -march=nvptx64 test.ll Starting program: /home/dmikushin/sandbox/bin/llc -march=nvptx64 test.ll [Thread debugging using libthread_db enabled] This action is not supported yet! UNREACHABLE executed at /home/dmikushin/sandbox/src/llvm/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp:1198! Program received signal SIGABRT, Aborted. 0x00007ffff55ed3a5 in __GI_raise (sig=6) at ../nptl/sysdeps/unix/sysv/linux/raise.c:64 64 ../nptl/sysdeps/unix/sysv/linux/raise.c: No such file or directory. in ../nptl/sysdeps/unix/sysv/linux/raise.c (gdb) bt #0 0x00007ffff55ed3a5 in __GI_rais...
2012 Jun 29
0
[LLVMdev] [NVPTX] Backend failure in LegalizeDAG due to unimplemented expand in target lowering
...e test.ll The resulting IR is attached, and it is crashing in the same way. Is it a valid code? dmikushin at hp2:~/forge/kernelgen/branches/tests_lnt/behavior/sincos> llc test.ll.1 This action is not supported yet! UNREACHABLE executed at /tmp/rpmbuild_debug/BUILD/llvm/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp:1194! 0 libLLVM-3.2svn.so 0x00007f395f147077 1 libLLVM-3.2svn.so 0x00007f395f14763d 2 libpthread.so.0 0x00007f395dee05d0 3 libc.so.6 0x00007f395d74b945 gsignal + 53 4 libc.so.6 0x00007f395d74cf21 abort + 385 5 libLLVM-3.2svn.so 0x00007f395f1305d9 llvm::report_fatal_error...
2012 Jun 01
2
[LLVMdev] legalization of truncating stores in LegalizeDAG.cpp
In LegalizeDAG.cpp, truncating stores are custom-lowered in line 1314-1317: 1314 case TargetLowering::Custom: 1315 ReplaceNode(SDValue(Node, 0), 1316 TLI.LowerOperation(SDValue(Node, 0), DAG)); 1317 break; Is there a reason it doesn't check whether the SDV...
2012 Jun 01
0
[LLVMdev] legalization of truncating stores in LegalizeDAG.cpp
Hi Akira, On 01/06/12 02:27, Hatanaka, Akira wrote: > In LegalizeDAG.cpp, truncating stores are custom-lowered in line 1314-1317: > > 1314 case TargetLowering::Custom: > 1315 ReplaceNode(SDValue(Node, 0), > 1316 TLI.LowerOperation(SDValue(Node, 0), DAG)); > 1317 break; > > Is there a reason it do...
2008 Jun 11
0
[LLVMdev] some warning from VS2005 (requested by gabor)
...480) : warning C4244: 'argument' : conversion from 'int64_t' to 'unsigned int', possible loss of data ..\..\lib\CodeGen\SelectionDAG\DAGCombiner.cpp(5480) : warning C4244: 'argument' : conversion from 'int64_t' to 'unsigned int', possible loss of data LegalizeDAG.cpp ..\..\lib\CodeGen\SelectionDAG\LegalizeDAG.cpp(259) : warning C4244: 'initializing' : conversion from 'uint64_t' to 'unsigned int', possible loss of data ..\..\lib\CodeGen\SelectionDAG\LegalizeDAG.cpp(617) : warning C4244: '=' : conversion from 'uint64_t'...
2009 Dec 22
2
[LLVMdev] LegalizeDAG Error?
The LegalizeDAG.cpp file has this code in SelectionDAGLegalize::PromoteNode: case ISD::BSWAP: { unsigned DiffBits = NVT.getSizeInBits() - OVT.getSizeInBits(); Tmp1 = DAG.getNode(ISD::ZERO_EXTEND, dl, NVT, Tmp1); Tmp1 = DAG.getNode(ISD::BSWAP, dl, NVT, Tmp1); Tmp1 = DAG.getNode(ISD::SRL, dl, NVT,...
2009 May 22
0
[LLVMdev] [PATCH] Add new phase to legalization to handle vector operations
...9 at 5:26 PM, Eli Friedman > <eli.friedman at gmail.com> wrote: > >> On Wed, May 20, 2009 at 4:55 PM, Dan Gohman <gohman at apple.com> wrote: >> >>> Can you explain why you chose the approach of using a new pass? >>> >>> I pictured removing LegalizeDAG's type legalization code would >>> >>> mostly consist of finding all the places that use TLI.getTypeAction >>> >>> and just deleting code for handling its Expand and Promote. Are you >>> >>> anticipating something more complicated? >>&...
2008 Oct 26
6
[LLVMdev] Turning on LegalizeTypes by default
Hi all, I plan to turn on the new type legalization infrastructure "LegalizeTypes" by default tomorrow. This is a redesign/reimplementation of the logic currently in LegalizeDAG that turns (for example) 64 bit arithmetic on a 32 bit machine into a series of 32 bit operations. As well as being a cleaner design, it also supports code generation for arbitrary precision integers such as i123. This is likely to cause some breakage since I mostly only added support for operat...
2013 Aug 05
2
[LLVMdev] Promote MVT::f32 load/store to MVT::i32 cause infinite loop in LegalizeDAG?
...hat and I instead tried a new approach (to simplify things) : setOperationAction(ISD::STORE, MVT::f32, Promote); AddPromotedToType(ISD::STORE, MVT::f32, MVT::i32); setOperationAction(ISD::LOAD, MVT::f32, Promote); AddPromotedToType(ISD::LOAD, MVT::f32, MVT::i32); Now SelectionDAGLegalize::LegalizeDAG() get stuck into an infinite loop. What is going on? I still have the following:(but I think that's fine) addRegisterClass(MVT::f32, &Opus::GR32RegClass); Thanks. (My LLVM is ~3 months old) -------------- next part -------------- An HTML attachment was scrubbed... URL: <http://lists....
2009 Jan 16
2
[LLVMdev] PIC16 backend for llvm 2.5
...ts, which is an array of SDValue. Targets will push the result values in this array and then we can replace values in ExpandIntegerOperand(). Very much like what CustomLowerResults() and ReplaceNodeResults() are doing currently. The problem is that do we want to change calls to LowerOperation() in LegalizeDAG as well? I think probably that is the right approach to go in the longer term. But currently I suggest that "Results" be the last argument to LowerOperation() which is defaulted to NULL. That way LegalizeDAG and all targets will continue to work the current way, plus targets like ours tha...
2009 Feb 24
3
[LLVMdev] [llvm-commits] [llvm] r65296 - in /llvm/trunk: include/llvm/CodeGen/ lib/CodeGen/SelectionDAG/ lib/Target/CellSPU/ lib/Target/PowerPC/ lib/Target/X86/ test/CodeGen/X86/
....cpp:3200 #8 0x002bb54f in llvm::PPCTargetLowering::LowerOperation (this=0x1803d58, Op={Node = 0x157a530, ResNo = 0}, DAG=@0x16088a0) at PPCISelLowering.cpp:3766 #9 0x0051bed6 in (anonymous namespace)::SelectionDAGLegalize::LegalizeOp (this=0xbffff0e8, Op={Node = 0x157a530, ResNo = 0}) at LegalizeDAG.cpp:1608 #10 0x0054837d in (anonymous namespace)::SelectionDAGLegalize::HandleOp (this=0xbffff0e8, Op={Node = 0x157a530, ResNo = 0}) at LegalizeDAG.cpp:519 #11 0x005485a5 in (anonymous namespace)::SelectionDAGLegalize::LegalizeDAG (this=0xbffff0e8) at LegalizeDAG.cpp:389 #12 0x00548734 in l...
2009 Dec 22
0
[LLVMdev] LegalizeDAG Error?
On Dec 22, 2009, at 2:38 PMPST, Bill Wendling wrote: > The LegalizeDAG.cpp file has this code in > SelectionDAGLegalize::PromoteNode: > > case ISD::BSWAP: { > unsigned DiffBits = NVT.getSizeInBits() - OVT.getSizeInBits(); > Tmp1 = DAG.getNode(ISD::ZERO_EXTEND, dl, NVT, Tmp1); > Tmp1 = DAG.getNode(ISD::BSWAP, dl, NVT, Tmp1); > Tmp1 =...
2013 Aug 05
1
[LLVMdev] Promote MVT::f32 load/store to MVT::i32 cause infinite loop in LegalizeDAG?
...ach (to simplify things) : > > setOperationAction(ISD::STORE, MVT::f32, Promote); > AddPromotedToType(ISD::STORE, MVT::f32, MVT::i32); > setOperationAction(ISD::LOAD, MVT::f32, Promote); > AddPromotedToType(ISD::LOAD, MVT::f32, MVT::i32); > > Now SelectionDAGLegalize::LegalizeDAG() get stuck into an infinite loop. > What is going on? > > I still have the following:(but I think that's fine) > addRegisterClass(MVT::f32, &Opus::GR32RegClass); Have you specified a register class for MVT::i32? If not, I think that may be your problem. -Tom
2009 Jan 16
0
[LLVMdev] PIC16 backend for llvm 2.5
...SDValue. Targets will push the result values in this array and > then we can replace values in ExpandIntegerOperand(). Very much like > what CustomLowerResults() and ReplaceNodeResults() are doing currently. > > The problem is that do we want to change calls to LowerOperation() in > LegalizeDAG as well? I think probably that is the right approach to go > in the longer term. But currently I suggest that "Results" be the last > argument to LowerOperation() which is defaulted to NULL. That way > LegalizeDAG and all targets will continue to work the current way, plus > t...
2007 Sep 26
2
[LLVMdev] viewGraph
...ory, reconfigured and rebuilt the project. However, gdb does not consistently recognize SelectionDAG::viewgraph(), some times it finds it and some times it says that llvm::SelectionDAG does not have viewGraph(). It worked for couple of instances when I was in my modules but when for example I am in LegalizeDAG::LegalizeOp() it is not recognized. I tried "viewGragh()" as well as "this->viewGrah()" Could someone shed some light on this for me please? Thanks, Alireza Moshtaghi Senior Software Engineer Development Systems, Microchip Technology -------------- next part ----...
2013 Aug 05
0
[LLVMdev] Promote MVT::f32 load/store to MVT::i32 cause infinite loop in LegalizeDAG?
...gt; > > setOperationAction(ISD::STORE, MVT::f32, Promote); > > AddPromotedToType(ISD::STORE, MVT::f32, MVT::i32); > > setOperationAction(ISD::LOAD, MVT::f32, Promote); > > AddPromotedToType(ISD::LOAD, MVT::f32, MVT::i32); > > > > Now SelectionDAGLegalize::LegalizeDAG() get stuck into an infinite loop. > > What is going on? > > > > I still have the following:(but I think that's fine) > > addRegisterClass(MVT::f32, &Opus::GR32RegClass); > > Have you specified a register class for MVT::i32? If not, I think that > may be...
2009 Feb 25
3
[LLVMdev] [llvm-commits] [llvm] r65296 - in /llvm/trunk: include/llvm/CodeGen/ lib/CodeGen/SelectionDAG/ lib/Target/CellSPU/ lib/Target/PowerPC/ lib/Target/X86/ test/CodeGen/X86/
...in llvm::PPCTargetLowering::LowerOperation > (this=0x1803d58, Op={Node = 0x157a530, ResNo = 0}, DAG=@0x16088a0) > at PPCISelLowering.cpp:3766 > #9 0x0051bed6 in (anonymous > namespace)::SelectionDAGLegalize::LegalizeOp (this=0xbffff0e8, > Op={Node = 0x157a530, ResNo = 0}) at LegalizeDAG.cpp:1608 > #10 0x0054837d in (anonymous > namespace)::SelectionDAGLegalize::HandleOp (this=0xbffff0e8, > Op={Node = 0x157a530, ResNo = 0}) at LegalizeDAG.cpp:519 > #11 0x005485a5 in (anonymous > namespace)::SelectionDAGLegalize::LegalizeDAG (this=0xbffff0e8) at > LegalizeD...
2008 Oct 26
0
[LLVMdev] Turning on LegalizeTypes by default
On Oct 26, 2008, at 1:03 AM, Duncan Sands wrote: > Hi all, I plan to turn on the new type legalization infrastructure > "LegalizeTypes" by default tomorrow. This is a redesign/ > reimplementation > of the logic currently in LegalizeDAG that turns (for example) 64 bit > arithmetic on a 32 bit machine into a series of 32 bit operations. > As well > as being a cleaner design, it also supports code generation for > arbitrary > precision integers such as i123. Woo hoo! > So please: if LegalizeTypes breaks some...
2009 Feb 19
0
[LLVMdev] Possible error in LegalizeDAG
On Thu, Feb 19, 2009 at 10:35 AM, Villmow, Micah <Micah.Villmow at amd.com> wrote: > On the hardware that I am targeting, which is not a CPU, I must support > i8 loads, however the hardware only supports natively 32bit aligned > loads, therefore I have to read in 4 i8's and unpack them and shift them > based on the read address. So any i8 load has a 75% chance of being >
2007 Jul 14
1
[LLVMdev] [PATCH] fix a "jump to case label crosses initialization of llvm::MVT::ValueType VT" error
Index: llvm/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp =================================================================== --- llvm.orig/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp 2007-07-14 16:59:23.000000000 +0200 +++ llvm/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp 2007-07-14 16:59:52.000000000 +0200 @@ -696,7 +696,7 @@ } } break; -...