Displaying 20 results from an estimated 7625 matches for "i32".
Did you mean:
32
2012 Sep 21
3
[LLVMdev] Alias Analysis accuracy
On Fri, Sep 21, 2012 at 3:08 PM, Welson Sun <welson.sun at gmail.com> wrote:
> OK, with the restrict type qualifier, it is a little bit better:
>
> The IR's function signature becomes:
> define void @foo(i32* noalias %a, i32* noalias %b, i32* noalias %c) nounwind
> {
>
> Now the AA result:
> Function: foo: 13 pointers, 0 call sites
> NoAlias: i32* %a, i32* %b
> NoAlias: i32* %a, i32* %c
> NoAlias: i32* %b, i32* %c
> NoAlias: i32* %a, i32** %a_addr
>...
2012 Sep 21
0
[LLVMdev] Alias Analysis accuracy
Here is the result of running mem2reg then basicaa, it is even worse: (%a
should be alias to %0, and partial alias to %3)
opt -mem2reg -basicaa -aa-eval -print-all-alias-modref-info < foo.s >
/dev/null
Function: foo: 6 pointers, 0 call sites
NoAlias: i32* %a, i32* %b
NoAlias: i32* %a, i32* %c
NoAlias: i32* %b, i32* %c
PartialAlias: i32* %1, i32* %a
NoAlias: i32* %1, i32* %b
NoAlias: i32* %1, i32* %c
NoAlias: i32* %4, i32* %a
PartialAlias: i32* %4, i32* %b
NoAlias: i32* %4, i32* %c
NoAlias: i32* %...
2012 Sep 21
0
[LLVMdev] Alias Analysis accuracy
OK, with the restrict type qualifier, it is a little bit better:
The IR's function signature becomes:
define void @foo(i32* noalias %a, i32* noalias %b, i32* noalias %c)
nounwind {
Now the AA result:
Function: foo: 13 pointers, 0 call sites
NoAlias: i32* %a, i32* %b
NoAlias: i32* %a, i32* %c
NoAlias: i32* %b, i32* %c
NoAlias: i32* %a, i32** %a_addr
NoAlias: i32* %b, i32** %a_addr
N...
2012 Sep 21
3
[LLVMdev] Alias Analysis accuracy
Can you give an example? And is this limited to C (not C++) only?
On Fri, Sep 21, 2012 at 2:52 PM, Liu, Yaxun (Sam) <Yaxun.Liu at amd.com> wrote:
> I think you may add restrict type qualifier.****
>
> ** **
>
> Sam****
>
> ** **
>
> *From:* llvmdev-bounces at cs.uiuc.edu [mailto:llvmdev-bounces at cs.uiuc.edu] *On
> Behalf Of *Welson Sun
> *Sent:* Friday,
2011 Apr 02
1
[LLVMdev] User defined types in LLVM-IR
Hi,
LLVM front end is taking a user defined type of
[21 x { i32, i32, i32, [8 x i32] }]
and converting it to the structurally equivalent type
{ { i32, i32, i32, [8 x i32] }, { i32, i32, i32, [8 x i32] }, { i32, i32,
i32, [8 x i32] }, { i32, i32, i32, [8 x i32] }, { i32, i32, i32, [8 x i32]
}, { i32, i32, i32, [8 x i32] }, { i32, i32, i32, [8 x i32] }, { i32,...
2013 Feb 04
6
[LLVMdev] Vectorizer using Instruction, not opcodes
...ode:
int direct (int k) {
int i;
int a[256], b[256], c[256];
for (i=0; i<256; i++){
a[i] = b[i] * c[i];
}
return a[k];
}
** ASM vectorized result:
adr r5, .LCPI0_0
vdup.32 q9, r1
vld1.64 {d16, d17}, [r5, :128]
add r1, r1, #4
vadd.i32 q8, q9, q8
cmp r3, r1
vmov.32 r5, d16[0]
add r6, lr, r5, lsl #2
add r7, r2, r5, lsl #2
vld1.32 {d16, d17}, [r6]
add r5, r4, r5, lsl #2
vld1.32 {d18, d19}, [r7]
vmul.i32 q8, q9, q8
vst1.32 {d16, d17...
2014 Sep 18
2
[LLVMdev] [Vectorization] Mis match in code generated
...d above reduction is legal to vectorize,
loop vectorizer produces vectorized code :
*IR without vectorization:*
*target datalayout = "e-m:e-p:32:32-f64:32:64-f80:32-n8:16:32-S128"target
triple = "x86_64-pc-linux-gnu"; Function Attrs: nounwind readonlydefine i32
@foo(i32* nocapture readonly %a, i32 %n) #0 {entry: br label
%for.bodyfor.body: ; preds =
%for.body, %entry %i.05 = phi i32 [ 0, %entry ], [ %inc, %for.body ]
%sum.04 = phi i32 [ 0, %entry ], [ %add, %for.body ] %arrayidx =
getelementptr inbounds i32* %a,...
2012 Mar 02
2
[LLVMdev] Question on debug information
Hi all,
I'm using my own front-end to generate following code .ll file targeting
x86 32-bit:
; ModuleID = 'check.c'
target datalayout =
"e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:32:32-n8:16:32"
target triple = "i386-pc-linux-gnu"
@.str581 = internal constant [52 x i8] c"---- test number %d failed. result
%d expected %d\0a\00"
@.str584 = internal constant [61 x i8] c"---- %...
2014 Sep 18
2
[LLVMdev] [Vectorization] Mis match in code generated
...ut vectorization:*
>
>
>
>
>
>
>
>
>
>
>
>
>
>
>
>
>
>
>
>
>
> *target datalayout = "e-m:e-p:32:32-f64:32:64-f80:32-n8:16:32-S128"target
> triple = "x86_64-pc-linux-gnu"; Function Attrs: nounwind readonlydefine i32
> @foo(i32* nocapture readonly %a, i32 %n) #0 {entry: br label
> %for.bodyfor.body: ; preds =
> %for.body, %entry %i.05 = phi i32 [ 0, %entry ], [ %inc, %for.body ]
> %sum.04 = phi i32 [ 0, %entry ], [ %add, %for.body ] %arrayidx =
> getelem...
2012 Feb 20
2
[LLVMdev] ARM opcode format
...at is not dealt with in the ARMCodeEmitter.cpp and that's the
problem I'm facing.
The triple I'm using is "armv7-unknown-linux-gnueabi" and the bitcode I'm
dealing with is:
; ModuleID = 'CRYO jit'
target triple = "armv7a-unknown-linux-gnueabi"
define i32 @execute(i8* %JNIEnv, i8* %v8) {
entry:
%litTemp = alloca i32
%v0_INTEGER = alloca i32
%v4_INTEGER = alloca i32
%v5_INTEGER = alloca i32
%v2_INTEGER = alloca i32
%v6_INTEGER = alloca i32
%v5_POINTER = alloca i8*
%v1_INTEGER = alloca i32
%v3_INTEGER = alloca i32
%v7_IN...
2016 Feb 10
4
Memory Store/Load Optimization Issue (Emulating stack)
Thank you for the hint.
I adjusted the code and it works:
The code after replacing inttoptr with getelementptr:
define { i32, i32, i8* } @test(i32 %foo, i32 %bar, i8* %sp) {
entry:
; push foo (On "stack")
%sp_1 = getelementptr i8, i8* %sp, i32 -4
%sp_1_ptr = bitcast i8* %sp_1 to i32*
store i32 %foo, i32* %sp_1_ptr, align 4
; push bar
%sp_2 = getelementptr i8, i8* %sp_1, i32 -4
%sp_2_ptr = bitcast...
2016 Feb 08
2
Memory Store/Load Optimization Issue (Emulating stack)
Hello,
I am trying to emulate the "stack" as like on x86 when using push/pop so
afterwards I can use LLVM's optimizer passes to simplify (reduce junk) the
code.
The LLVM IR code:
define { i32, i32, i32 } @test(i32 %foo, i32 %bar, i32 %sp) {
; push foo (On "stack")
%sp_1 = sub i32 %sp, 4
%sp_1_ptr = inttoptr i32 %sp_1 to i32*
store i32 %foo, i32* %sp_1_ptr, align 4
; push bar
%sp_2 = sub i32 %sp_1, 4
%sp_2_ptr = inttoptr i32 %sp_2 to i32*
store i32 %bar, i32* %...
2008 Jan 12
1
[LLVMdev] Labels
...fy a parser generator to emit LLVM code instead of C.
So far the experience has been trivial, but I am now running into an error
regarding labels that I can't seem to solve.
Situation 1: A label is used immediately after a void function call (l6 in
this case):
<snip>
%tmp26 = load i32* @yybegin, align 4
%tmp27 = load i32* @yyend, align 4
call void @yyDo(void (i8*, i32)* @yy_7_body, i32 %tmp26, i32 %tmp27)
l6:
br label %l2
<snip>
I get the following error:
llvm-as: test.ll:578,0: test.ll:578: error: syntax error, unexpected LABELSTR,
expecting LOAD or STORE while read...
2017 Mar 30
2
InstructionSimplify: adding a hook for shufflevector instructions
As Sanjay noted in D31426<https://reviews.llvm.org/D31426#712701>, InstructionSimplify is missing the following simplification:
This function:
define <4 x i32> @splat_operand(<4 x i32> %x) {
%splat = shufflevector <4 x i32> %x, <4 x i32> undef, <4 x i32> zeroinitializer
%shuf = shufflevector <4 x i32> %splat, <4 x i32> undef, <4 x i32> <i32 0, i32 3, i32 2, i32 1>
ret <4 x i32> %shuf
}
ca...
2011 Feb 15
3
[LLVMdev] How to use ConstantFoldConstantExpression?
...anything. Could you please give me some advice, what I am doing wrong?
My code looks something like this:
//data layout is obtained from clang-generated code for triple arm-none-linux-gnueabi with added v32:32:32
const char* const TARGET_DATA_LAYOUT =
"e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v32:32:32-v64:64:64-v128:128:128-a0:0:64-n32";
TargetData TD(TARGET_DATA_LAYOUT);
void transformConstantExpr(ConstantExpr* cop)
{
Constant* val = ConstantFoldConstantExpression(cop, &TD);
if (val != NULL)
{
errs() << "**" &l...
2012 Mar 06
0
[LLVMdev] Question on debug information
...is topic ?
Thanks
Seb
2012/3/2 Seb <babslachem at gmail.com>
> Hi all,
>
> I'm using my own front-end to generate following code .ll file targeting
> x86 32-bit:
>
> ; ModuleID = 'check.c'
> target datalayout =
> "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:32:32-n8:16:32"
> target triple = "i386-pc-linux-gnu"
> @.str581 = internal constant [52 x i8] c"---- test number %d failed.
> result %d expected %d\0a\00"
> @.str584 = internal constant [61...
2013 Oct 24
4
[LLVMdev] Vectorizing alloca instructions
Hi,
I've been playing around with the SLPVectorizer trying to get it to
vectorize this simple program:
define void @vector(i32 addrspace(1)* %out, i32 %index) {
entry:
%0 = alloca [4 x i32]
%x = getelementptr [4 x i32]* %0, i32 0, i32 0
%y = getelementptr [4 x i32]* %0, i32 0, i32 1
%z = getelementptr [4 x i32]* %0, i32 0, i32 2
%w = getelementptr [4 x i32]* %0, i32 0, i32 3
store i32 0, i32* %x
store i32 1,...
2012 Sep 21
3
[LLVMdev] Alias Analysis accuracy
...to improve the LLVM alias analysis accuracy.
I am currently using llvmgcc 2.9 and llvm 3.0. Here is the C code:
void foo(int a[SIZE], int b[SIZE], int c[SIZE])
{
for(int i=0; i<SIZE; i++)
c[i] = a[i] + b[i];
}
Here is the IR:
target datalayout =
"e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128-f128:128:128-n8:16:32:64"
target triple = "x86_64-unknown-linux-gnu"
define void @_Z3fooPiS_S_(i32* %a, i32* %b, i32* %c) nounwind {
entry:
%a_addr = alloca i32*, align 8
%b_addr = alloca i32...
2012 Mar 06
2
[LLVMdev] Question on debug information
...> Thanks
> Seb
>
> 2012/3/2 Seb <babslachem at gmail.com>
> Hi all,
>
> I'm using my own front-end to generate following code .ll file targeting x86 32-bit:
>
> ; ModuleID = 'check.c'
> target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:32:32-n8:16:32"
> target triple = "i386-pc-linux-gnu"
> @.str581 = internal constant [52 x i8] c"---- test number %d failed. result %d expected %d\0a\00"
> @.str584 = internal constant [61 x i8...
2012 Feb 20
0
[LLVMdev] ARM opcode format
...at is not dealt with in the ARMCodeEmitter.cpp and that's the problem I'm facing.
The triple I'm using is "armv7-unknown-linux-gnueabi" and the bitcode I'm dealing with is:
; ModuleID = 'CRYO jit'
target triple = "armv7a-unknown-linux-gnueabi"
define i32 @execute(i8* %JNIEnv, i8* %v8) {
entry:
%litTemp = alloca i32
%v0_INTEGER = alloca i32
%v4_INTEGER = alloca i32
%v5_INTEGER = alloca i32
%v2_INTEGER = alloca i32
%v6_INTEGER = alloca i32
%v5_POINTER = alloca i8*
%v1_INTEGER = alloca i32
%v3_INTEGER = alloca i32
%v7_IN...