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Scott Michel

2007-Oct-17 04:06 UTC

[LLVMdev] The one remaining bug keeping CellSPU from release...

Evan:

What you requested was in the debug output (sans offending Node), but  
here it is, outside of the attachment. The offending node is  
highlighted:

SU(0): 0xa908760: ch = EntryToken
SU(1): 0xa907600: i32,ch,flag = CopyFromReg 0xa9095d0, 0xa9070e0,  
0xa9095d0:1
     0xa906e30: ch,flag = CopyToReg 0xa908760, 0xa9070e0, 0xa9071f0  
<<--<<--<<--<<--<< Node
     0xa9095d0: ch,flag = inlineasm 0xa906e30, 0xa908570, 0xa908c60,  
0xa9070e0, 0xa9075a0, 0xa9070e0, 0xa906e30:1
SU(2): 0xa909560: ch = CopyToReg 0xa907600:1, 0xa909500, 0xa907600
SU(3): 0xa907ff0: ch = BRZ 0xa907600, 0xa906f10, 0xa909560

0xa906e30: ch,flag = CopyToReg 0xa908760, 0xa9070e0, 0xa9071f0


-scooter

On Oct 16, 2007, at 12:00 AM, Evan Cheng wrote:
> This is a scheduler assertion. It means a value (virtual register) use
> is somehow scheduled before its definition.
>
> Please run llc in gdb. Call dumpSchedule() to print out the schedule.
> Also please let me know which node it is processing at the time of the
> assertion.
>
> Evan
>
> On Oct 15, 2007, at 11:48 PM, Scott Michel <scottm at aero.org>
wrote:
>
>> Yup, I've got one remaining bug that holding up the CellSPU
release.
>> It still has a bunch of warts, but so long as I can get it into
>> shape such that llvm-gcc-4.2 compiles all the way through, then we
>> collectively have something with which to work.
>>
>> I'm getting the following error from llc, the attachments have
llc's
>> debug and the .ll files, respectively. Can anyone shed some light on
>> what I should look at to track this one down?
>>
>> /Users/scottm/play/llvm/branches/llvm-spu/lib/CodeGen/SelectionDAG/
>> ScheduleDAG.cpp:406: failed assertion `I != VRBaseMap.end() &&
"Node
>> emitted out of order - late"'
>>
>>
>> -scooter
>>
>> <crtbegin.debug>
>> <testcase.ll>
>> _______________________________________________
>> LLVM Developers mailing list
>> LLVMdev at cs.uiuc.edu         http://llvm.cs.uiuc.edu
>> http://lists.cs.uiuc.edu/mailman/listinfo/llvmdev
> _______________________________________________
> LLVM Developers mailing list
> LLVMdev at cs.uiuc.edu         http://llvm.cs.uiuc.edu
> http://lists.cs.uiuc.edu/mailman/listinfo/llvmdev

Evan Cheng

2007-Oct-18 18:23 UTC

head link

[LLVMdev] The one remaining bug keeping CellSPU from release...

Sorry, still not enough information. I am guessing it's asserting in  
getVR() called from EmitNode()? The node is CopyToReg and it's trying  
to find the virtual register of operand 2? From the schedule, I don't  
see the definition of the operand.

Can you do DAG.viewGraph()? That should gives us a better idea.

Evan

On Oct 16, 2007, at 9:06 PM, Scott Michel wrote:
> Evan:
>
> What you requested was in the debug output (sans offending Node), but
> here it is, outside of the attachment. The offending node is
> highlighted:
>
> SU(0): 0xa908760: ch = EntryToken
> SU(1): 0xa907600: i32,ch,flag = CopyFromReg 0xa9095d0, 0xa9070e0,
> 0xa9095d0:1
>     0xa906e30: ch,flag = CopyToReg 0xa908760, 0xa9070e0, 0xa9071f0
> <<--<<--<<--<<--<< Node
>     0xa9095d0: ch,flag = inlineasm 0xa906e30, 0xa908570, 0xa908c60,
> 0xa9070e0, 0xa9075a0, 0xa9070e0, 0xa906e30:1
> SU(2): 0xa909560: ch = CopyToReg 0xa907600:1, 0xa909500, 0xa907600
> SU(3): 0xa907ff0: ch = BRZ 0xa907600, 0xa906f10, 0xa909560
>
> 0xa906e30: ch,flag = CopyToReg 0xa908760, 0xa9070e0, 0xa9071f0
>
>
> -scooter
>
> On Oct 16, 2007, at 12:00 AM, Evan Cheng wrote:
>
>> This is a scheduler assertion. It means a value (virtual register)  
>> use
>> is somehow scheduled before its definition.
>>
>> Please run llc in gdb. Call dumpSchedule() to print out the schedule.
>> Also please let me know which node it is processing at the time of  
>> the
>> assertion.
>>
>> Evan
>>
>> On Oct 15, 2007, at 11:48 PM, Scott Michel <scottm at aero.org>
wrote:
>>
>>> Yup, I've got one remaining bug that holding up the CellSPU
release.
>>> It still has a bunch of warts, but so long as I can get it into
>>> shape such that llvm-gcc-4.2 compiles all the way through, then we
>>> collectively have something with which to work.
>>>
>>> I'm getting the following error from llc, the attachments have
llc's
>>> debug and the .ll files, respectively. Can anyone shed some light
on
>>> what I should look at to track this one down?
>>>
>>> /Users/scottm/play/llvm/branches/llvm-spu/lib/CodeGen/SelectionDAG/
>>> ScheduleDAG.cpp:406: failed assertion `I != VRBaseMap.end()
&& "Node
>>> emitted out of order - late"'
>>>
>>>
>>> -scooter
>>>
>>> <crtbegin.debug>
>>> <testcase.ll>
>>> _______________________________________________
>>> LLVM Developers mailing list
>>> LLVMdev at cs.uiuc.edu         http://llvm.cs.uiuc.edu
>>> http://lists.cs.uiuc.edu/mailman/listinfo/llvmdev
>> _______________________________________________
>> LLVM Developers mailing list
>> LLVMdev at cs.uiuc.edu         http://llvm.cs.uiuc.edu
>> http://lists.cs.uiuc.edu/mailman/listinfo/llvmdev
>
> _______________________________________________
> LLVM Developers mailing list
> LLVMdev at cs.uiuc.edu         http://llvm.cs.uiuc.edu
> http://lists.cs.uiuc.edu/mailman/listinfo/llvmdev

Chris Lattner

2007-Oct-18 18:45 UTC

head link

[LLVMdev] The one remaining bug keeping CellSPU from release...

On Thu, 18 Oct 2007, Evan Cheng wrote:> Sorry, still not enough information. I am guessing it's asserting in
> getVR() called from EmitNode()? The node is CopyToReg and it's trying
> to find the virtual register of operand 2? From the schedule, I don't
> see the definition of the operand.
Scott, why not just check in the code?  That would make it much easier to 
debug this, and there is no harm in doing so.

-Chris
>
>> Evan:
>>
>> What you requested was in the debug output (sans offending Node), but
>> here it is, outside of the attachment. The offending node is
>> highlighted:
>>
>> SU(0): 0xa908760: ch = EntryToken
>> SU(1): 0xa907600: i32,ch,flag = CopyFromReg 0xa9095d0, 0xa9070e0,
>> 0xa9095d0:1
>>     0xa906e30: ch,flag = CopyToReg 0xa908760, 0xa9070e0, 0xa9071f0
>> <<--<<--<<--<<--<< Node
>>     0xa9095d0: ch,flag = inlineasm 0xa906e30, 0xa908570, 0xa908c60,
>> 0xa9070e0, 0xa9075a0, 0xa9070e0, 0xa906e30:1
>> SU(2): 0xa909560: ch = CopyToReg 0xa907600:1, 0xa909500, 0xa907600
>> SU(3): 0xa907ff0: ch = BRZ 0xa907600, 0xa906f10, 0xa909560
>>
>> 0xa906e30: ch,flag = CopyToReg 0xa908760, 0xa9070e0, 0xa9071f0
>>
>>
>> -scooter
>>
>> On Oct 16, 2007, at 12:00 AM, Evan Cheng wrote:
>>
>>> This is a scheduler assertion. It means a value (virtual register)
>>> use
>>> is somehow scheduled before its definition.
>>>
>>> Please run llc in gdb. Call dumpSchedule() to print out the
schedule.
>>> Also please let me know which node it is processing at the time of
>>> the
>>> assertion.
>>>
>>> Evan
>>>
>>> On Oct 15, 2007, at 11:48 PM, Scott Michel <scottm at
aero.org> wrote:
>>>
>>>> Yup, I've got one remaining bug that holding up the CellSPU
release.
>>>> It still has a bunch of warts, but so long as I can get it into
>>>> shape such that llvm-gcc-4.2 compiles all the way through, then
we
>>>> collectively have something with which to work.
>>>>
>>>> I'm getting the following error from llc, the attachments
have llc's
>>>> debug and the .ll files, respectively. Can anyone shed some
light on
>>>> what I should look at to track this one down?
>>>>
>>>>
/Users/scottm/play/llvm/branches/llvm-spu/lib/CodeGen/SelectionDAG/
>>>> ScheduleDAG.cpp:406: failed assertion `I != VRBaseMap.end()
&& "Node
>>>> emitted out of order - late"'
>>>>
>>>>
>>>> -scooter
>>>>
>>>> <crtbegin.debug>
>>>> <testcase.ll>
>>>> _______________________________________________
>>>> LLVM Developers mailing list
>>>> LLVMdev at cs.uiuc.edu         http://llvm.cs.uiuc.edu
>>>> http://lists.cs.uiuc.edu/mailman/listinfo/llvmdev
>>> _______________________________________________
>>> LLVM Developers mailing list
>>> LLVMdev at cs.uiuc.edu         http://llvm.cs.uiuc.edu
>>> http://lists.cs.uiuc.edu/mailman/listinfo/llvmdev
>>
>> _______________________________________________
>> LLVM Developers mailing list
>> LLVMdev at cs.uiuc.edu         http://llvm.cs.uiuc.edu
>> http://lists.cs.uiuc.edu/mailman/listinfo/llvmdev
>
> _______________________________________________
> LLVM Developers mailing list
> LLVMdev at cs.uiuc.edu         http://llvm.cs.uiuc.edu
> http://lists.cs.uiuc.edu/mailman/listinfo/llvmdev
>
-Chris

-- 
http://nondot.org/sabre/
http://llvm.org/

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