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This is a scheduler assertion. It means a value (virtual register) use is somehow scheduled before its definition. Please run llc in gdb. Call dumpSchedule() to print out the schedule. Also please let me know which node it is processing at the time of the assertion. Evan On Oct 15, 2007, at 11:48 PM, Scott Michel <scottm at aero.org> wrote: > Yup, I've got one remaining bug that holding up the CellSPU release. > It still has a...

Yup, I've got one remaining bug that holding up the CellSPU release. It still has a bunch of warts, but so long as I can get it into shape such that llvm-gcc-4.2 compiles all the way through, then we collectively have something with which to work. I'm getting the following error from llc, the attachments have llc's debug and the .ll files, respectively. Can anyone shed some

..., 0xa909560 0xa906e30: ch,flag = CopyToReg 0xa908760, 0xa9070e0, 0xa9071f0 -scooter On Oct 16, 2007, at 12:00 AM, Evan Cheng wrote: > This is a scheduler assertion. It means a value (virtual register) use > is somehow scheduled before its definition. > > Please run llc in gdb. Call dumpSchedule() to print out the schedule. > Also please let me know which node it is processing at the time of the > assertion. > > Evan > > On Oct 15, 2007, at 11:48 PM, Scott Michel <scottm at aero.org> wrote: > >> Yup, I've got one remaining bug that holding up the CellSP...

..., 0xa9070e0, 0xa9071f0 > > > -scooter > > On Oct 16, 2007, at 12:00 AM, Evan Cheng wrote: > >> This is a scheduler assertion. It means a value (virtual register) >> use >> is somehow scheduled before its definition. >> >> Please run llc in gdb. Call dumpSchedule() to print out the schedule. >> Also please let me know which node it is processing at the time of >> the >> assertion. >> >> Evan >> >> On Oct 15, 2007, at 11:48 PM, Scott Michel <scottm at aero.org> wrote: >> >>> Yup, I've got o...

Here's a working testcase: ; ModuleID = '/tmp/crtbegin.bc' target datalayout = "E-p:32:32:128-i1:8:128-i8:8:128-i16:16:128-i32:32:128-i64:32:128-f32:32:128-f64:64:128-v64:64:64-v128:128:128-a0:0:128-s0:128:128" target triple = "spu" @__dso_handle = hidden global i8* null, align 16 ; <i8**> [#uses=0] @__CTOR_LIST__ = internal global [1 x void