llvm dev - Sep 2006 - [LLVMdev] how to declare that two registers must be different

On Mon, 18 Sep 2006, [UTF-8] Rafael Esp?ndola wrote:
>>     "The destination register shall not be the same as the operand
>>     register Rm. R15 shall not be used as an operand or as the
>>     destination register."
>
> The ARM ARM has this "Operand restriction" on MUL:
> Specifying the same register for <Rd> and <Rm> has UNPEDICTABLE
results.
My copy of the ARM ARM says:

"Use of R15:  Specifying R15 for register <Rd>, <Rm>, or
<Rs> has
UNPREDICTABLE results."

This is the same as above.  However, it goes on to say:

"Operand restriction: Specifying the same register for <Rd> and
<Rm> was
previously described as producing UNPREDICTABLE results. There is no 
restriction in ARMv6, and it is believed all relevant ARMv4 and ARMv5 
implementations do not require this restriction either, because high 
performance multipliers read all their operands prior to writing back any 
results."

Perhaps this isn't an issue any more?  I don't know the arch well enough
to know what it means by "all relevant" implementations.

-Chris
>> Then, for the load and store multiple instructions, LDM and STM, the
R15
>> should not be used as the base register.  Neither should R15 be the
>> destination for an MCR, Move to Co-processor register from Register.
>>
>> These are some examples, hopefully enough to alter the regalloc
>> interface to cope.
>
> Restrictions of the form cannot be register Rx can be solved by
> creating a register class without Rx. The problem is the "must not be
> the same" restriction.
>
>> Cheers,
>>
>>
>> Ralph.
>
> Thanks,
> Rafael
> _______________________________________________
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> LLVMdev at cs.uiuc.edu         http://llvm.cs.uiuc.edu
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>
-Chris

-- 
http://nondot.org/sabre/
http://llvm.org/

> My copy of the ARM ARM says:
>
> "Use of R15:  Specifying R15 for register <Rd>, <Rm>, or
<Rs> has
> UNPREDICTABLE results."
>
> This is the same as above.  However, it goes on to say:
>
> "Operand restriction: Specifying the same register for <Rd> and
<Rm> was
> previously described as producing UNPREDICTABLE results. There is no
> restriction in ARMv6, and it is believed all relevant ARMv4 and ARMv5
> implementations do not require this restriction either, because high
> performance multipliers read all their operands prior to writing back any
> results."
>
> Perhaps this isn't an issue any more?  I don't know the arch well
enough
> to know what it means by "all relevant" implementations.
I think that I will ask for a new ARM ARM :-)

The gnu assemble gives an error if rd and rm are the same. Even with
-march=armv6. So I think that I will have to implement an workaround
anyway.
> -Chris
Thank you very much,
Rafael

Hi

Rafael wrote:
> Chris Lattner wrote:
> > Perhaps this isn't an issue any more?  I don't know the arch
well
> > enough to know what it means by "all relevant"
implementations.
>
> I think that I will ask for a new ARM ARM :-)
> 
> The gnu assemble gives an error if rd and rm are the same. Even with
> -march=armv6. So I think that I will have to implement an workaround
> anyway.
And it would be nice to be able to add support for those older
architectures someday.

Cheers,


Ralph.