Displaying 20 results from an estimated 755 matches for "unpredict".
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2011 Aug 12
1
[LLVMdev] New ARM disassembler - unpredictable instructions
...g 12, 2011, at 1:02 AM, James Molloy wrote:
> I’ve got a load of examples for this, but I’ll pick one.
>
> echo '0xB0 0x00 0x00 0x00' |/work/llvm-cmake2/build/bin/llvm-mc -arch arm --disassemble –
> strheq r0, [r0], -r0
>
> This instruction encoding is marked UNPREDICTABLE. The question is: does a disassembly of it have value? One use case put to me was in a debugger, where one needs to know if an instruction was ARM-mode or Thumb-mode so it can correctly guess the mode of the previous instruction in the stream and disassemble that correctly.
OK, I think I was m...
2011 Aug 11
1
[LLVMdev] New ARM disassembler - unpredictable instructions
...haven't really done comprehensive testing yet—it passes all the decoding tests that the previous disassembler passed, but I'm sure there are many cases that it does not yet get right. Patches welcome.
> Currently it does not provide information as to whether a particular bitpattern was UNPREDICTABLE or not. For example, an invalid bitpattern may return correct disassembly for an alternative, predictable instruction meaning that the sequence X -> disassemble -> assemble -> Y could end up with X being different to Y.
Can you give an example of this?
--Owen
-------------- next part...
2017 May 18
2
Computing loop trip counts with Scalar evolution
Hello.
I tried to get the trip count of a loop with Scalar evolution. I got inspired from
http://stackoverflow.com/questions/13834364/how-to-get-loop-bounds-in-llvm .
However the analysis described there doesn't work well for the second inner loop of
thes function below (although if we declare Bcols a short it works well):
void MatMul(int Arows, int Acols, int Brows, int
2019 Jan 15
2
Issues with using scalar evolution with newer versions of LLVM IR
...m trying to use scalar evolution pass using following command;
opt -analyze -mem2reg -indvars -loop-simplify -scalar-evolution < vec.bc
when vec.bc is generated using newer version of LLVM i.e LLVM 6 and 7 i get
following message in the end;
Determining loop execution counts for: @main
Loop %8: Unpredictable backedge-taken count.
Loop %8: Unpredictable max backedge-taken count.
Loop %8: Unpredictable predicated backedge-taken count.
which means it is unable to compute iteration count.
However, when .bc file is generated using LLVM 4.0 i am getting following;
Determining loop execution counts for:...
2011 Aug 11
0
[LLVMdev] New ARM disassembler - unpredictable instructions
...g at the new ARM disassembler, and performing testing to see if
there are any obvious bugs I can fix. Overall it looks really nice - I've
only found one obvious bug that I'm packaging up a patch for now.
Currently it does not provide information as to whether a particular
bitpattern was UNPREDICTABLE or not. For example, an invalid bitpattern may
return correct disassembly for an alternative, predictable instruction
meaning that the sequence X -> disassemble -> assemble -> Y could end up
with X being different to Y.
This is fine, however there should be some notification to the...
2002 Jul 08
0
[Bug 341] New: Return Code unpredictable
http://bugzilla.mindrot.org/show_bug.cgi?id=341
Summary: Return Code unpredictable
Product: Portable OpenSSH
Version: -current
Platform: Other
OS/Version: AIX
Status: NEW
Severity: normal
Priority: P3
Component: ssh
AssignedTo: openssh-unix-dev at mindrot.org
ReportedBy: norbert.w...
2019 Jan 16
3
Issues with using scalar evolution with newer versions of LLVM IR
...command;
> >
> > opt -analyze -mem2reg -indvars -loop-simplify -scalar-evolution < vec.bc
> > when vec.bc is generated using newer version of LLVM i.e LLVM 6 and 7 i
> get following message in the end;
> > Determining loop execution counts for: @main
> > Loop %8: Unpredictable backedge-taken count.
> > Loop %8: Unpredictable max backedge-taken count.
> > Loop %8: Unpredictable predicated backedge-taken count.
> > which means it is unable to compute iteration count.
> >
> > However, when .bc file is generated using LLVM 4.0 i am getting
&...
2013 May 23
0
[LLVMdev] Definition of RegisterClass for load instruction in Thumb2
...e Reserved.set(…) calls in ARMBaseRegisterInfo.cpp.
That said, this inconsistency is probably wrong anyway (or at best an approximation to reality) because it affects what the assembler supports. For example
ldrsb sp, [r0]!
is allowed, but
ldrsb sp, [r0]
is forbidden. I think they should both be UNPREDICTABLE (though this is an understandable error; support for unpredictable is in its early stages).
Annoyingly, there is *some* distinction between the writeback and non-writeback versions. Fixing it properly might get hairy rather quickly.
Tim.
2010 Aug 09
2
ZFS with EMC PowerPath
...lf the emcpower pseudo device names. So the SA can easily be confused.
Is there a way to tell ZFS which device names to use? Is there a way to change which devices are referenced in a current pool?
I know about the "-d" option to zpool, however to use the names in /dev/dsk can lead to unpredictable results (due to unpredictable SA''s).
2002 Jul 09
2
[Bug 341] Return Code unpredictable
http://bugzilla.mindrot.org/show_bug.cgi?id=341
------- Additional Comments From norbert.weuster at mgi.de 2002-07-09 15:44 -------
the optinal Flags -n and/or -T doesn't change the situation
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2002 Sep 23
0
[Bug 341] Return Code unpredictable
http://bugzilla.mindrot.org/show_bug.cgi?id=341
------- Additional Comments From john.osell at telus.com 2002-09-24 09:39 -------
I have the same problem. The script as follows is run from cron:
while [ 1 ]
do
ssh <hostname> date
echo $?
done
The script returns 255 anywhere from 2-20% of the time when run from cron and
works perfectly fine when run from the command line.
I
2003 Jan 07
2
[Bug 341] Return Code unpredictable
http://bugzilla.mindrot.org/show_bug.cgi?id=341
------- Additional Comments From djm at mindrot.org 2003-01-07 18:26 -------
Please verify that this is still the case with 3.5p1 (2.9 is ooold)
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You are the assignee for the bug, or are watching the assignee.
2003 Feb 26
1
[Bug 341] Return Code unpredictable
http://bugzilla.mindrot.org/show_bug.cgi?id=341
gq at cs.msu.su changed:
What |Removed |Added
----------------------------------------------------------------------------
Status|RESOLVED |REOPENED
Resolution|FIXED |
------- Additional Comments From gq at cs.msu.su 2003-02-27 05:42 -------
I have
2005 Jan 18
2
Outbound calls unpredictable
I've been looking through the archives and have not been able to find anyone
with a similar problem but perhaps I'm not searching in the right places. The
problem is that my outbound call sometimes go though and sometimes don't. If
someone can point me in the right direction it will be highly appreciated.
2004 Jun 29
0
The '!' in the path names causes unpredictable results with directory listings
I filed this as a bug, but wanted to post this to the ng to check if
anyone has ever seen this. I'm using samba 3.0.4.
This is a somewhat weird situation, so please bear with me through the
description.
The following path:
"C:\! 01 Carte Geografiche\carte\"
When read with smbclient the windows share will only show 160 files in the
folder. When read on the windows machine it
2012 Nov 01
0
Group membership lost unpredictably
Hi,
I have a very bizarre problem linking to my Active Directory from my Ubuntu
11.10 system. I have three AD users setup with them belonging to a
specific AD group. When I first login a user onto my Ubuntu system, that
user is shown to be a member of the group:
wbinfo -r <user>
And if I show the group members, it also lists my user:
wbinfo --gid-info <gid>
However - after a
2009 Jun 05
1
Slow/unpredictive response of post_form from rails lib
Hi friends,
I''m facing a very strange problem...
I consume a webservice from within my rails app. I''ve written a thin
wrapper around the webservice using Net::HTTP.post_form
However, when calling the API from within my controllers, the API calls
randomly fail, complaining about timeout.
But - when I wrote a simple iterative test (500 iterations), calling the
same webservice
2012 May 10
0
[LLVMdev] MC Hammer Test results
...codegen failure so hopefully bugs that would have
triggered an assertion will still show up without them on.
[4] (reproduced bug triage from the error output)
[bug 1] echo 0xb0 0x00 0x80 0xe6 | ./llvm-mc -triple armv7 --show-inst
--show-encoding --disassemble
This bitpattern should decode to an unpredictable SEL r0, r0, r0. MC is
decoding this to an STR r0, [r0], r0, lsr #1 which it is incorrectly diagnosing
as unpredictable.
[bug 2] echo 0x70 0x01 0x80 0xe6 | ./llvm-mc -triple armv7 --show-inst
--show-encoding --disassemble
This bitpattern should decode to an unpredictable SXTAB16 r0, r0, r0. M...
2013 Sep 11
0
Unpredictable behaviour of several network shares
Hello,
I have recently started having problems with my installation of Samba
that I can't attribute to any single cause. On some of the computers I
have networked (like 2-3 of total 40) sometimes I can't access some
shares (again, 2-3 shares from 26 total). When this error occurs,
Windows client tells me I might not have proper privileges but I can
access the same share with the same
2015 Jun 26
2
[LLVMdev] [cfe-dev] bitwise ops on booleans
On Fri, Jun 26, 2015 at 2:17 PM, Joerg Sonnenberger <joerg at britannica.bec.de
> wrote:
> On Fri, Jun 26, 2015 at 12:51:38PM -0600, Sanjay Patel wrote:
> > Assuming the transform is correct, what is the recommended way to write
> > this in C/C++ to achieve the desired effect: we want both comparisons to
> be
> > evaluated (do *not* want short-circuiting)?
>
>