I'd like to announce the first public demo of a hardware FLAC decoder that I and three of my colleagues have been working on over the past 8 months. This project has been developed as part of the University of Waterloo's Fourth Year Design Project requirement for undergrad students in Electrical & Computer Engineering. Our decoder has been implemented in VHDL and is currently targeted on an FPGA platform. It interfaces with a simple microcontroller and an on board DAC provided by our development board. Currently, the hardware decoder is capable of decoding FLAC subset streams with sample rates <= 48000Hz and 16-bits per sample. The DAC being used for our prototype demo is configured for 44100Hz stereo audio, as the prototype was intended for use with CD sourced audio. All synchronization and decoding functions have been implemented in the hardware's state machine. My team would like to thank Josh and everyone else who has worked on the FLAC project for having such a well documented format and such helpful mailing lists. For background on the project, you can check out our project website: http://hquad.project.googlepages.com/ or contact us at our team mailing list: hquad.project@gmail.com You can find out more about the design project symposium below: http://eceprojects.uwaterloo.ca/symposium.html The demo will take place on Wednesday, January 23rd, from 9am-8pm. If anyone is in the area and interested in attending, the event is open to the public. The symposium takes place in the University of Waterloo's Davis Centre. University of Waterloo 200 University Ave. W. Waterloo, ON Canada N2L 3G1 Hope to see some of you there! Regards, Cole Stewart, Mark Eaves, Colin Lancaster & Jason Shirtliff