Dante Cinco
2010-May-27 18:37 UTC
[Xen-users] MSI-X errors with 8G QLogic Fibre Channel HBA in Windows 2008 domU using Xen 4.0.0
I''m seeing MSI-X related errors (pt_msix_update_one: Error: Mapping
msix
entry 0) when I start a Windows 2008 domU. I''m using xen-pciback to
hide a
pair of 8G QLogic HBA devices from dom0 which I''m assigning to the
Windows
domU. Maybe the MSI-X table size of 32 is causing some problem. I''ve
tried
to include as much log information below.
Dante
Here''s the result of lspci -vvv:
0d:00.0 Fibre Channel: QLogic Corp. ISP2532-based 8Gb Fibre Channel to PCI
Express HBA (rev 02)
Subsystem: QLogic Corp. Device 015d
Control: I/O+ Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr-
Stepping- SERR- FastB2B- DisINTx-
Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort-
<TAbort- <MAbort- >SERR- <PERR- INTx-
Latency: 0, Cache Line Size: 64 bytes
Interrupt: pin A routed to IRQ 30
Region 0: I/O ports at 5000 [size=256]
Region 1: Memory at fbef0000 (64-bit, non-prefetchable) [size=16K]
Region 3: Memory at fbd00000 (64-bit, non-prefetchable) [size=1M]
Expansion ROM at e4100000 [disabled] [size=256K]
Capabilities: [44] Power Management version 3
Flags: PMEClk- DSI- D1- D2- AuxCurrent=0mA
PME(D0-,D1-,D2-,D3hot-,D3cold-
)
Status: D0 PME-Enable- DSel=0 DScale=0 PME-
Capabilities: [4c] Express (v2) Endpoint, MSI 00
DevCap: MaxPayload 1024 bytes, PhantFunc 0, Latency L0s
<1us, L1 <1us
ExtTag- AttnBtn- AttnInd- PwrInd- RBE+ FLReset+
DevCtl: Report errors: Correctable- Non-Fatal+ Fatal+
Unsupported-
RlxdOrd+ ExtTag- PhantFunc- AuxPwr- NoSnoop+
FLReset-
MaxPayload 128 bytes, MaxReadReq 512 bytes
DevSta: CorrErr- UncorrErr+ FatalErr- UnsuppReq- AuxPwr-
TransPend-
LnkCap: Port #0, Speed 5GT/s, Width x8, ASPM L0s, Latency L0
<2us, L1 <2us
ClockPM- Suprise- LLActRep- BwNot-
LnkCtl: ASPM Disabled; RCB 64 bytes Disabled- Retrain-
CommClk-
ExtSynch- ClockPM- AutWidDis- BWInt- AutBWInt-
LnkSta: Speed 5GT/s, Width x4, TrErr- Train- SlotClk+
DLActive- BWMgmt- ABWMgmt-
Capabilities: [88] Message Signalled Interrupts: Mask- 64bit+
Queue=0/5 Enable-
Address: 00000000fee00000 Data: 402e
Capabilities: [98] Vital Product Data <?>
Capabilities: [a0] MSI-X: Enable+ Mask- TabSize=32
Vector table: BAR=1 offset=00002000
PBA: BAR=1 offset=00003000
Capabilities: [100] Advanced Error Reporting <?>
Capabilities: [138] Power Budgeting <?>
Kernel driver in use: pciback
0d:00.1 Fibre Channel: QLogic Corp. ISP2532-based 8Gb Fibre Channel to PCI
Express HBA (rev 02)
Subsystem: QLogic Corp. Device 015d
Control: I/O+ Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr-
Stepping- SERR- FastB2B- DisINTx-
Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort-
<TAbort- <MAbort- >SERR- <PERR- INTx-
Latency: 0, Cache Line Size: 64 bytes
Interrupt: pin B routed to IRQ 37
Region 0: I/O ports at 5400 [size=256]
Region 1: Memory at fbcf0000 (64-bit, non-prefetchable) [size=16K]
Region 3: Memory at fbb00000 (64-bit, non-prefetchable) [size=1M]
Expansion ROM at e4140000 [disabled] [size=256K]
Capabilities: [44] Power Management version 3
Flags: PMEClk- DSI- D1- D2- AuxCurrent=0mA
PME(D0-,D1-,D2-,D3hot-,D3cold-)
Status: D0 PME-Enable- DSel=0 DScale=0 PME-
Capabilities: [4c] Express (v2) Endpoint, MSI 00
DevCap: MaxPayload 1024 bytes, PhantFunc 0, Latency L0s
<1us, L1 <1us
ExtTag- AttnBtn- AttnInd- PwrInd- RBE+ FLReset+
DevCtl: Report errors: Correctable- Non-Fatal+ Fatal+
Unsupported-
RlxdOrd+ ExtTag- PhantFunc- AuxPwr- NoSnoop+
FLReset-
MaxPayload 128 bytes, MaxReadReq 512 bytes
DevSta: CorrErr- UncorrErr+ FatalErr- UnsuppReq- AuxPwr-
TransPend-
LnkCap: Port #0, Speed 5GT/s, Width x8, ASPM L0s, Latency L0
<2us, L1 <2us
ClockPM- Suprise- LLActRep- BwNot-
LnkCtl: ASPM Disabled; RCB 64 bytes Disabled- Retrain-
CommClk-
ExtSynch- ClockPM- AutWidDis- BWInt- AutBWInt-
LnkSta: Speed 5GT/s, Width x4, TrErr- Train- SlotClk+
DLActive- BWMgmt- ABWMgmt-
Capabilities: [88] Message Signalled Interrupts: Mask- 64bit+
Queue=0/5 Enable-
Address: 00000000fee00000 Data: 4036
Capabilities: [98] Vital Product Data <?>
Capabilities: [a0] MSI-X: Enable+ Mask- TabSize=32
Vector table: BAR=1 offset=00002000
PBA: BAR=1 offset=00003000
Capabilities: [100] Advanced Error Reporting <?>
Capabilities: [138] Power Budgeting <?>
Kernel driver in use: pciback
xend.log:
[2010-05-25 03:00:54 3110] DEBUG (XendDomainInfo:822)
XendDomainInfo.hvm_pci_device_insert_dev: 0000:0d:00.0@100
,msitranslate=1,power_mgmt=0
[2010-05-25 03:00:54 3110] DEBUG (XendDomainInfo:826) pci: assign device
0000:0d:00.0@100,msitranslate=1,power_mgmt=0
[2010-05-25 03:00:54 3110] DEBUG (image:508) signalDeviceModel: orig_state
is None, retrying
[2010-05-25 03:00:54 3110] DEBUG (image:508) signalDeviceModel: orig_state
is None, retrying
[2010-05-25 03:00:54 3110] DEBUG (image:508) signalDeviceModel: orig_state
is None, retrying
[2010-05-25 03:00:54 3110] DEBUG (image:508) signalDeviceModel: orig_state
is None, retrying
[2010-05-25 03:00:55 3110] INFO (image:538) signalDeviceModel:restore dm
state to running
[2010-05-25 03:00:55 3110] INFO (pciquirk:92) NO quirks found for PCI device
[1077:2532:1077:015d]
[2010-05-25 03:00:55 3110] DEBUG (pciquirk:135) Permissive mode NOT enabled
for PCI device [1077:2532:1077:015d]
[2010-05-25 03:00:55 3110] DEBUG (pciif:320) pci: enabling ioport
0x5000/0x100
[2010-05-25 03:00:55 3110] DEBUG (pciif:334) pci: enabling iomem
0xfbef0000/0x4000 pfn 0xfbef0/0x4
[2010-05-25 03:00:55 3110] DEBUG (pciif:334) pci: enabling iomem
0xfbd00000/0x100000 pfn 0xfbd00/0x100
[2010-05-25 03:00:55 3110] DEBUG (pciif:334) pci: enabling iomem
0x20100000/0x40000 pfn 0x20100/0x40
[2010-05-25 03:00:55 3110] DEBUG (pciif:351) pci: enabling irq 30
[2010-05-25 03:00:55 3110] INFO (pciquirk:92) NO quirks found for PCI device
[1077:2532:1077:015d]
[2010-05-25 03:00:55 3110] DEBUG (pciquirk:135) Permissive mode NOT enabled
for PCI device [1077:2532:1077:015d]
[2010-05-25 03:00:55 3110] DEBUG (pciif:320) pci: enabling ioport
0x5400/0x100
[2010-05-25 03:00:55 3110] DEBUG (pciif:334) pci: enabling iomem
0xfbcf0000/0x4000 pfn 0xfbcf0/0x4
[2010-05-25 03:00:55 3110] DEBUG (pciif:334) pci: enabling iomem
0xfbb00000/0x100000 pfn 0xfbb00/0x100
[2010-05-25 03:00:55 3110] DEBUG (pciif:334) pci: enabling iomem
0x20140000/0x40000 pfn 0x20140/0x40
[2010-05-25 03:00:55 3110] DEBUG (pciif:351) pci: enabling irq 37
[2010-05-25 03:00:55 3110] DEBUG (pciif:456) pci: register aer watch
/local/domain/0/backend/pci/1/0/aerState
[2010-05-25 03:00:55 3110] DEBUG (pciif:169) Reconfiguring PCI device
0000:0d:00.0.
[2010-05-25 03:00:55 3110] INFO (pciquirk:92) NO quirks found for PCI device
[1077:2532:1077:015d]
[2010-05-25 03:00:55 3110] DEBUG (pciquirk:135) Permissive mode NOT enabled
for PCI device [1077:2532:1077:015d]
[2010-05-25 03:00:55 3110] DEBUG (pciif:320) pci: enabling ioport
0x5000/0x100
[2010-05-25 03:00:55 3110] DEBUG (pciif:334) pci: enabling iomem
0xfbef0000/0x4000 pfn 0xfbef0/0x4
[2010-05-25 03:00:55 3110] DEBUG (pciif:334) pci: enabling iomem
0xfbd00000/0x100000 pfn 0xfbd00/0x100
[2010-05-25 03:00:55 3110] DEBUG (pciif:334) pci: enabling iomem
0x20100000/0x40000 pfn 0x20100/0x40
[2010-05-25 03:00:55 3110] DEBUG (pciif:351) pci: enabling irq 30
[2010-05-25 03:00:56 3110] DEBUG (XendDomainInfo:826) pci: assign device
0000:0d:00.1@100,msitranslate=1,power_mgmt=0
[2010-05-25 03:00:56 3110] INFO (image:538) signalDeviceModel:restore dm
state to running
[2010-05-25 03:00:56 3110] DEBUG (pciif:169) Reconfiguring PCI device
0000:0d:00.1.
[2010-05-25 03:00:56 3110] INFO (pciquirk:92) NO quirks found for PCI device
[1077:2532:1077:015d]
[2010-05-25 03:00:56 3110] DEBUG (pciquirk:135) Permissive mode NOT enabled
for PCI device [1077:2532:1077:015d]
[2010-05-25 03:00:56 3110] DEBUG (pciif:320) pci: enabling ioport
0x5400/0x100
[2010-05-25 03:00:56 3110] DEBUG (pciif:334) pci: enabling iomem
0xfbcf0000/0x4000 pfn 0xfbcf0/0x4
[2010-05-25 03:00:56 3110] DEBUG (pciif:334) pci: enabling iomem
0xfbb00000/0x100000 pfn 0xfbb00/0x100
[2010-05-25 03:00:56 3110] DEBUG (pciif:334) pci: enabling iomem
0x20140000/0x40000 pfn 0x20140/0x40
[2010-05-25 03:00:56 3110] DEBUG (pciif:351) pci: enabling irq 37
qemu-dm-win2008.log:
domid: 2
config qemu network with xen bridge for tap2.0 eth0
Using xvda for guest''s hda
Watching /local/domain/0/device-model/2/logdirty/cmd
Watching /local/domain/0/device-model/2/command
char device redirected to /dev/pts/2
qemu_map_cache_init nr_buckets = 10000 size 4194304
shared page at pfn feffd
buffered io page at pfn feffb
Guest uuid = 3ed399c0-03b2-442f-2205-546e2c4b7126
Time offset set 0
populating video RAM at ff000000
mapping video RAM from ff000000
Register xen platform.
Done register platform.
platform_fixed_ioport: changed ro/rw state of ROM memory area. now is rw
state.
xs_read(/local/domain/0/device-model/2/xen_extended_power_mgmt): read error
xs_read(): vncpasswd get error.
/vm/3ed399c0-03b2-442f-2205-546e2c4b7126/vncpasswd.
Log-dirty: no command yet.
I/O request not ready: 0, ptr: 0, port: 0, data: 0, count: 0, size: 0
xs_read(/local/domain/2/log-throttling): read error
qemu: ignoring not-understood drive `/local/domain/2/log-throttling''
medium change watch on `/local/domain/2/log-throttling'' - unknown
device,
ignored
dm-command: hot insert pass-through pci dev
register_real_device: Assigning real physical device 0d:00.0 ...
register_real_device: Enable MSI translation via per device option
register_real_device: Disable power management
pt_iomul_init: Error: pt_iomul_init can''t open file /dev/xen/pci_iomul:
No
such file or directory: 0xd:0x0.0x0
pt_register_regions: IO region registered (size=0x00000100
base_addr=0x00005001)
pt_register_regions: IO region registered (size=0x00004000
base_addr=0xfbef0004)
pt_register_regions: IO region registered (size=0x00100000
base_addr=0xfbd00004)
pt_register_regions: Expansion ROM registered (size=0x00040000
base_addr=0xe4100000)
pt_msix_init: get MSI-X table bar base fbef0000
pt_msix_init: table_off = 2000, total_entries = 32
pt_msix_init: errno = 2
pt_msix_init: mapping physical MSI-X table to 7fcf6feef000
pt_msi_setup: msi mapped with pirq 4f
pci_intx: intx=1
register_real_device: Real physical device 0d:00.0 registered successfuly!
IRQ type = MSI-INTx
dm-command: hot insert pass-through pci dev
register_real_device: Assigning real physical device 0d:00.1 ...
register_real_device: Enable MSI translation via per device option
register_real_device: Disable power management
pt_iomul_init: Error: pt_iomul_init can''t open file /dev/xen/pci_iomul:
No
such file or directory: 0xd:0x0.0x1
pt_register_regions: IO region registered (size=0x00000100
base_addr=0x00005401)
pt_register_regions: IO region registered (size=0x00004000
base_addr=0xfbcf0004)
pt_register_regions: IO region registered (size=0x00100000
base_addr=0xfbb00004)
pt_register_regions: Expansion ROM registered (size=0x00040000
base_addr=0xe4140000)
pt_msix_init: get MSI-X table bar base fbcf0000
pt_msix_init: table_off = 2000, total_entries = 32
pt_msix_init: errno = 2
pt_msix_init: mapping physical MSI-X table to 7fcf6feee000
pt_msi_setup: msi mapped with pirq 4e
pci_intx: intx=2
register_real_device: Real physical device 0d:00.1 registered successfuly!
IRQ type = MSI-INTx
cirrus vga map change while on lfb mode
pt_iomem_map: e_phys=f3000000 maddr=fbd00000 type=0 len=1048576 index=3
first_map=1
pt_iomem_map: e_phys=f3100000 maddr=fbb00000 type=0 len=1048576 index=3
first_map=1
pt_iomem_map: e_phys=f32a0000 maddr=fbef0000 type=0 len=16384 index=1
first_map=1
pt_iomem_map: e_phys=f32a4000 maddr=fbcf0000 type=0 len=16384 index=1
first_map=1
pt_ioport_map: e_phys=c100 pio_base=5000 len=256 index=0 first_map=1
pt_ioport_map: e_phys=c200 pio_base=5400 len=256 index=0 first_map=1
Overlapped to device[00:06.0][Region:6][Address:f3240000h][Size:00040000h]
pt_bar_mapping_one: Warning:
ptdev[00:05.0][Region:6][Address:f3200001h][Size:00040000h] is overlapped.
pt_iomem_map: e_phys=f3200001 maddr=e4100000 type=8 len=262144 index=6
first_map=1
pt_iomem_map: e_phys=ffffffff maddr=e4100000 type=8 len=262144 index=6
first_map=0
Overlapped to device[00:04.0][Region:0][Address:f3280000h][Size:00020000h]
pt_bar_mapping_one: Warning:
ptdev[00:06.0][Region:6][Address:f3240001h][Size:00040000h] is overlapped.
pt_iomem_map: e_phys=f3240001 maddr=e4140000 type=8 len=262144 index=6
first_map=1
pt_iomem_map: e_phys=ffffffff maddr=e4140000 type=8 len=262144 index=6
first_map=0
mapping vram to f0000000 - f0400000
platform_fixed_ioport: changed ro/rw state of ROM memory area. now is rw
state.
platform_fixed_ioport: changed ro/rw state of ROM memory area. now is ro
state.
pt_ioport_map: e_phys=ffff pio_base=5000 len=256 index=0 first_map=0
pt_iomem_map: e_phys=ffffffff maddr=fbef0000 type=0 len=16384 index=1
first_map=0
pt_iomem_map: e_phys=ffffffff maddr=fbd00000 type=0 len=1048576 index=3
first_map=0
pt_ioport_map: e_phys=c100 pio_base=5000 len=256 index=0 first_map=0
pt_iomem_map: e_phys=f32a0000 maddr=fbef0000 type=0 len=16384 index=1
first_map=0
pt_iomem_map: e_phys=f3000000 maddr=fbd00000 type=0 len=1048576 index=3
first_map=0
pt_ioport_map: e_phys=ffff pio_base=5400 len=256 index=0 first_map=0
pt_iomem_map: e_phys=ffffffff maddr=fbcf0000 type=0 len=16384 index=1
first_map=0
pt_iomem_map: e_phys=ffffffff maddr=fbb00000 type=0 len=1048576 index=3
first_map=0
pt_ioport_map: e_phys=c200 pio_base=5400 len=256 index=0 first_map=0
pt_iomem_map: e_phys=f32a4000 maddr=fbcf0000 type=0 len=16384 index=1
first_map=0
pt_iomem_map: e_phys=f3100000 maddr=fbb00000 type=0 len=1048576 index=3
first_map=0
pt_ioport_map: e_phys=ffff pio_base=5000 len=256 index=0 first_map=0
pt_iomem_map: e_phys=ffffffff maddr=fbef0000 type=0 len=16384 index=1
first_map=0
pt_iomem_map: e_phys=ffffffff maddr=fbd00000 type=0 len=1048576 index=3
first_map=0
pt_ioport_map: e_phys=c100 pio_base=5000 len=256 index=0 first_map=0
pt_iomem_map: e_phys=f32a0000 maddr=fbef0000 type=0 len=16384 index=1
first_map=0
pt_iomem_map: e_phys=f3000000 maddr=fbd00000 type=0 len=1048576 index=3
first_map=0
pt_msixctrl_reg_write: guest enabling MSI-X, disable MSI-INTx translation
pci_intx: intx=1
pt_msix_update_one: Update msix entry 0 with pirq 4d gvec b0
pt_msix_update_one: Update msix entry 1 with pirq 4c gvec a0
pt_msix_update_one: Update msix entry 2 with pirq 4b gvec 90
pt_msix_update_one: Update msix entry 3 with pirq 4a gvec 80
pt_msix_update_one: Update msix entry 4 with pirq 49 gvec 70
pt_msix_update_one: Update msix entry 5 with pirq 48 gvec 60
pt_msix_update_one: Update msix entry 6 with pirq 47 gvec 82
pt_msix_update_one: Update msix entry 7 with pirq 46 gvec 72
pt_msix_update_one: Update msix entry 8 with pirq 45 gvec 62
pt_msix_update_one: Update msix entry 9 with pirq 44 gvec 52
pt_msix_update_one: Update msix entry a with pirq 43 gvec b3
pt_msix_update_one: Update msix entry b with pirq 42 gvec a3
pt_msix_update_one: Update msix entry c with pirq 41 gvec 93
pt_msix_update_one: Update msix entry d with pirq 40 gvec 83
pt_msix_update_one: Update msix entry e with pirq 3f gvec 73
pt_msix_update_one: Update msix entry f with pirq 3e gvec 63
pt_msix_update_one: Update msix entry 10 with pirq 3d gvec 53
pt_msix_update_one: Update msix entry 11 with pirq 3c gvec b4
pt_msix_update_one: Update msix entry 12 with pirq 3b gvec a4
pt_msix_update_one: Update msix entry 13 with pirq 3a gvec 94
pt_msix_update_one: Update msix entry 14 with pirq 39 gvec 84
pt_msix_update_one: Update msix entry 15 with pirq 38 gvec 74
pt_msix_update_one: Update msix entry 16 with pirq 37 gvec 64
pt_msix_update_one: Update msix entry 17 with pirq 36 gvec 54
pt_msix_update_one: Update msix entry 18 with pirq 35 gvec b5
pt_msix_update_one: Update msix entry 19 with pirq 34 gvec a5
pt_msix_update_one: Update msix entry 1a with pirq 33 gvec 95
pt_msix_update_one: Update msix entry 1b with pirq 32 gvec 85
pt_msix_update_one: Update msix entry 1c with pirq 31 gvec 75
pt_msix_update_one: Update msix entry 1d with pirq 30 gvec 65
pt_msix_update_one: Error: Mapping msix entry 1e
pt_msix_update_one: Error: Mapping msix entry 1f
pt_ioport_map: e_phys=ffff pio_base=5400 len=256 index=0 first_map=0
pt_iomem_map: e_phys=ffffffff maddr=fbcf0000 type=0 len=16384 index=1
first_map=0
pt_iomem_map: e_phys=ffffffff maddr=fbb00000 type=0 len=1048576 index=3
first_map=0
pt_ioport_map: e_phys=c200 pio_base=5400 len=256 index=0 first_map=0
pt_iomem_map: e_phys=f32a4000 maddr=fbcf0000 type=0 len=16384 index=1
first_map=0
pt_iomem_map: e_phys=f3100000 maddr=fbb00000 type=0 len=1048576 index=3
first_map=0
pt_msixctrl_reg_write: guest enabling MSI-X, disable MSI-INTx translation
pci_intx: intx=2
pt_msix_update_one: Error: Mapping msix entry 0
pt_msix_update_one: Error: Mapping msix entry 1
pt_msix_update_one: Error: Mapping msix entry 2
pt_msix_update_one: Error: Mapping msix entry 3
pt_msix_update_one: Error: Mapping msix entry 4
pt_msix_update_one: Error: Mapping msix entry 5
pt_msix_update_one: Error: Mapping msix entry 6
pt_msix_update_one: Error: Mapping msix entry 7
pt_msix_update_one: Error: Mapping msix entry 8
pt_msix_update_one: Error: Mapping msix entry 9
pt_msix_update_one: Error: Mapping msix entry a
pt_msix_update_one: Error: Mapping msix entry b
pt_msix_update_one: Error: Mapping msix entry c
pt_msix_update_one: Error: Mapping msix entry d
pt_msix_update_one: Error: Mapping msix entry e
pt_msix_update_one: Error: Mapping msix entry f
pt_msix_update_one: Error: Mapping msix entry 10
pt_msix_update_one: Error: Mapping msix entry 11
pt_msix_update_one: Error: Mapping msix entry 12
pt_msix_update_one: Error: Mapping msix entry 13
pt_msix_update_one: Error: Mapping msix entry 14
pt_msix_update_one: Error: Mapping msix entry 15
pt_msix_update_one: Error: Mapping msix entry 16
pt_msix_update_one: Error: Mapping msix entry 17
pt_msix_update_one: Error: Mapping msix entry 18
pt_msix_update_one: Error: Mapping msix entry 19
pt_msix_update_one: Error: Mapping msix entry 1a
pt_msix_update_one: Error: Mapping msix entry 1b
pt_msix_update_one: Error: Mapping msix entry 1c
pt_msix_update_one: Error: Mapping msix entry 1d
pt_msix_update_one: Error: Mapping msix entry 1e
pt_msix_update_one: Error: Mapping msix entry 1f
(XEN) Guest interrupt information:
(XEN) IRQ: 30 affinity:00000000,00000000,00000000,00000001 vec:59
type=IO-APIC-level status=00000010 in-flight=0 domain-list=2: 30(----),
(XEN) IRQ: 37 affinity:00000000,00000000,00000000,00000001 vec:51
type=IO-APIC-level status=00000010 in-flight=0 domain-list=2: 37(----),
(XEN) IRQ: 76 affinity:00000000,00000000,00000000,00000001 vec:3e
type=PCI-MSI status=00000050 in-flight=0 domain-list=2: 77(----),
(XEN) IRQ: 77 affinity:00000000,00000000,00000000,00000001 vec:46
type=PCI-MSI status=00000050 in-flight=0 domain-list=2: 76(----),
(XEN) IRQ: 78 affinity:00000000,00000000,00000000,00000001 vec:4e
type=PCI-MSI status=00000050 in-flight=0 domain-list=2: 75(----),
(XEN) IRQ: 79 affinity:00000000,00000000,00000000,00000001 vec:56
type=PCI-MSI status=00000050 in-flight=0 domain-list=2: 74(----),
(XEN) IRQ: 80 affinity:00000000,00000000,00000000,00000001 vec:5e
type=PCI-MSI status=00000050 in-flight=0 domain-list=2: 73(----),
(XEN) IRQ: 81 affinity:00000000,00000000,00000000,00000001 vec:66
type=PCI-MSI status=00000050 in-flight=0 domain-list=2: 72(----),
(XEN) IRQ: 82 affinity:00000000,00000000,00000000,00000001 vec:6e
type=PCI-MSI status=00000050 in-flight=0 domain-list=2: 71(----),
(XEN) IRQ: 83 affinity:00000000,00000000,00000000,00000001 vec:76
type=PCI-MSI status=00000050 in-flight=0 domain-list=2: 70(----),
(XEN) IRQ: 84 affinity:00000000,00000000,00000000,00000001 vec:7e
type=PCI-MSI status=00000050 in-flight=0 domain-list=2: 69(----),
(XEN) IRQ: 85 affinity:00000000,00000000,00000000,00000001 vec:86
type=PCI-MSI status=00000050 in-flight=0 domain-list=2: 68(----),
(XEN) IRQ: 86 affinity:00000000,00000000,00000000,00000001 vec:8e
type=PCI-MSI status=00000050 in-flight=0 domain-list=2: 67(----),
(XEN) IRQ: 87 affinity:00000000,00000000,00000000,00000001 vec:96
type=PCI-MSI status=00000050 in-flight=0 domain-list=2: 66(----),
(XEN) IRQ: 88 affinity:00000000,00000000,00000000,00000001 vec:9e
type=PCI-MSI status=00000050 in-flight=0 domain-list=2: 65(----),
(XEN) IRQ: 89 affinity:00000000,00000000,00000000,00000001 vec:a6
type=PCI-MSI status=00000050 in-flight=0 domain-list=2: 64(----),
(XEN) IRQ: 90 affinity:00000000,00000000,00000000,00000001 vec:ae
type=PCI-MSI status=00000050 in-flight=0 domain-list=2: 63(----),
(XEN) IRQ: 91 affinity:00000000,00000000,00000000,00000001 vec:b6
type=PCI-MSI status=00000050 in-flight=0 domain-list=2: 62(----),
(XEN) IRQ: 92 affinity:00000000,00000000,00000000,00000001 vec:be
type=PCI-MSI status=00000050 in-flight=0 domain-list=2: 61(----),
(XEN) IRQ: 93 affinity:00000000,00000000,00000000,00000001 vec:c6
type=PCI-MSI status=00000050 in-flight=0 domain-list=2: 60(----),
(XEN) IRQ: 94 affinity:00000000,00000000,00000000,00000001 vec:ce
type=PCI-MSI status=00000050 in-flight=0 domain-list=2: 59(----),
(XEN) IRQ: 95 affinity:00000000,00000000,00000000,00000001 vec:d6
type=PCI-MSI status=00000050 in-flight=0 domain-list=2: 58(----),
(XEN) IRQ: 96 affinity:00000000,00000000,00000000,00000001 vec:de
type=PCI-MSI status=00000050 in-flight=0 domain-list=2: 57(----),
(XEN) IRQ: 97 affinity:00000000,00000000,00000000,00000001 vec:27
type=PCI-MSI status=00000050 in-flight=0 domain-list=2: 56(----),
(XEN) IRQ: 98 affinity:00000000,00000000,00000000,00000001 vec:2f
type=PCI-MSI status=00000050 in-flight=0 domain-list=2: 55(----),
(XEN) IRQ: 99 affinity:00000000,00000000,00000000,00000001 vec:37
type=PCI-MSI status=00000050 in-flight=0 domain-list=2: 54(----),
(XEN) IRQ: 100 affinity:00000000,00000000,00000000,00000001 vec:3f
type=PCI-MSI status=00000050 in-flight=0 domain-list=2: 53(----),
(XEN) IRQ: 101 affinity:00000000,00000000,00000000,00000001 vec:47
type=PCI-MSI status=00000050 in-flight=0 domain-list=2: 52(----),
(XEN) IRQ: 102 affinity:00000000,00000000,00000000,00000001 vec:4f
type=PCI-MSI status=00000050 in-flight=0 domain-list=2: 51(----),
(XEN) IRQ: 103 affinity:00000000,00000000,00000000,00000001 vec:57
type=PCI-MSI status=00000050 in-flight=0 domain-list=2: 50(----),
(XEN) IRQ: 104 affinity:00000000,00000000,00000000,00000001 vec:5f
type=PCI-MSI status=00000050 in-flight=0 domain-list=2: 49(----),
(XEN) IRQ: 105 affinity:00000000,00000000,00000000,00000001 vec:67
type=PCI-MSI status=00000050 in-flight=0 domain-list=2: 48(----),
(XEN) PCI-MSI interrupt information:
(XEN) MSI 49 vec=b0 fixed edge assert phys cpu dest=00000000
mask=1/1/1
(XEN) MSI 50 vec=b8 fixed edge assert phys cpu dest=00000000
mask=1/1/1
(XEN) MSI 51 vec=c0 fixed edge assert phys cpu dest=00000000
mask=1/1/1
(XEN) MSI 52 vec=c8 fixed edge assert phys cpu dest=00000000
mask=1/1/1
(XEN) MSI 53 vec=d0 fixed edge assert phys cpu dest=00000000
mask=1/1/1
(XEN) MSI 54 vec=d8 fixed edge assert phys cpu dest=00000000
mask=1/1/1
(XEN) MSI 55 vec=21 fixed edge assert phys cpu dest=00000000
mask=1/1/1
(XEN) MSI 56 vec=29 fixed edge assert phys cpu dest=00000000
mask=1/1/1
(XEN) MSI 57 vec=31 fixed edge assert phys cpu dest=00000000
mask=1/1/1
(XEN) MSI 58 vec=39 fixed edge assert phys cpu dest=00000000
mask=1/1/1
(XEN) MSI 59 vec=41 fixed edge assert phys cpu dest=00000000
mask=0/1/-1
(XEN) MSI 60 vec=49 fixed edge assert phys cpu dest=00000000
mask=0/1/-1
(XEN) MSIX 61 vec=c9 fixed edge assert phys cpu dest=00000000
mask=1/1/1
(XEN) MSIX 62 vec=d1 fixed edge assert phys cpu dest=00000000
mask=1/1/1
(XEN) MSIX 63 vec=2a fixed edge assert phys cpu dest=00000017
mask=1/0/0
(XEN) MSIX 64 vec=22 fixed edge assert phys cpu dest=00000000
mask=1/1/1
(XEN) MSIX 65 vec=d2 fixed edge assert phys cpu dest=00000000
mask=1/0/0
(XEN) MSIX 66 vec=da fixed edge assert phys cpu dest=00000000
mask=1/0/0
(XEN) MSIX 67 vec=23 fixed edge assert phys cpu dest=00000000
mask=1/0/0
(XEN) MSIX 68 vec=2b fixed edge assert phys cpu dest=00000000
mask=1/0/0
(XEN) MSIX 69 vec=33 fixed edge assert phys cpu dest=00000000
mask=1/0/0
(XEN) MSIX 70 vec=3b fixed edge assert phys cpu dest=00000000
mask=1/0/0
(XEN) MSIX 71 vec=43 fixed edge assert phys cpu dest=00000000
mask=1/0/0
(XEN) MSIX 72 vec=4b fixed edge assert phys cpu dest=00000000
mask=1/0/0
(XEN) MSIX 73 vec=53 fixed edge assert phys cpu dest=00000000
mask=1/1/1
(XEN) MSI 74 vec=2e fixed edge assert phys cpu dest=00000000
mask=0/1/-1
(XEN) MSI 75 vec=36 fixed edge assert phys cpu dest=00000000
mask=0/1/-1
(XEN) MSIX 76 vec=3e fixed edge assert phys cpu dest=00000000
mask=1/0/0
(XEN) MSIX 77 vec=46 fixed edge assert phys cpu dest=00000000
mask=1/0/0
(XEN) MSIX 78 vec=4e fixed edge assert phys cpu dest=00000000
mask=1/0/0
(XEN) MSIX 79 vec=56 fixed edge assert phys cpu dest=00000000
mask=1/0/0
(XEN) MSIX 80 vec=5e fixed edge assert phys cpu dest=00000000
mask=1/0/0
(XEN) MSIX 81 vec=66 fixed edge assert phys cpu dest=00000000
mask=1/0/0
(XEN) MSIX 82 vec=6e fixed edge assert phys cpu dest=00000000
mask=1/0/0
(XEN) MSIX 83 vec=76 fixed edge assert phys cpu dest=00000000
mask=1/0/0
(XEN) MSIX 84 vec=7e fixed edge assert phys cpu dest=00000000
mask=1/0/0
(XEN) MSIX 85 vec=86 fixed edge assert phys cpu dest=00000000
mask=1/0/0
(XEN) MSIX 86 vec=8e fixed edge assert phys cpu dest=00000000
mask=1/0/0
(XEN) MSIX 87 vec=96 fixed edge assert phys cpu dest=00000000
mask=1/0/0
(XEN) MSIX 88 vec=9e fixed edge assert phys cpu dest=00000000
mask=1/0/0
(XEN) MSIX 89 vec=a6 fixed edge assert phys cpu dest=00000000
mask=1/0/0
(XEN) MSIX 90 vec=ae fixed edge assert phys cpu dest=00000000
mask=1/0/0
(XEN) MSIX 91 vec=b6 fixed edge assert phys cpu dest=00000000
mask=1/0/0
(XEN) MSIX 92 vec=be fixed edge assert phys cpu dest=00000000
mask=1/0/0
(XEN) MSIX 93 vec=c6 fixed edge assert phys cpu dest=00000000
mask=1/0/0
(XEN) MSIX 94 vec=ce fixed edge assert phys cpu dest=00000000
mask=1/0/0
(XEN) MSIX 95 vec=d6 fixed edge assert phys cpu dest=00000000
mask=1/0/0
(XEN) MSIX 96 vec=de fixed edge assert phys cpu dest=00000000
mask=1/0/0
(XEN) MSIX 97 vec=27 fixed edge assert phys cpu dest=00000000
mask=1/0/0
(XEN) MSIX 98 vec=2f fixed edge assert phys cpu dest=00000000
mask=1/0/0
(XEN) MSIX 99 vec=37 fixed edge assert phys cpu dest=00000000
mask=1/0/0
(XEN) MSIX 100 vec=3f fixed edge assert phys cpu dest=00000000
mask=1/0/0
(XEN) MSIX 101 vec=47 fixed edge assert phys cpu dest=00000000
mask=1/0/0
(XEN) MSIX 102 vec=4f fixed edge assert phys cpu dest=00000000
mask=1/0/0
(XEN) MSIX 103 vec=57 fixed edge assert phys cpu dest=00000000
mask=1/0/0
(XEN) MSIX 104 vec=5f fixed edge assert phys cpu dest=00000000
mask=1/0/0
(XEN) MSIX 105 vec=67 fixed edge assert phys cpu dest=00000000
mask=1/0/0
(XEN) [Q: dump PCI devices]
(XEN) ==== PCI devices ===(XEN) 0d:00.1 - dom 2 - MSIs < 75 >
(XEN) 0d:00.0 - dom 2 - MSIs < 74 76 77 78 79 80 81 82 83 84 85 86 87 88
89 90 91 92 93 94 95 96 97 98 99 100 101 102 103 104 105 >
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Pasi Kärkkäinen
2010-May-28 11:37 UTC
Re: [Xen-users] MSI-X errors with 8G QLogic Fibre Channel HBA in Windows 2008 domU using Xen 4.0.0
On Thu, May 27, 2010 at 11:37:14AM -0700, Dante Cinco wrote:> I''m seeing MSI-X related errors (pt_msix_update_one: Error: Mapping msix > entry 0) when I start a Windows 2008 domU. I''m using xen-pciback to hide a > pair of 8G QLogic HBA devices from dom0 which I''m assigning to the Windows > domU. Maybe the MSI-X table size of 32 is causing some problem. I''ve tried > to include as much log information below. >What''s your dom0 kernel version? I think Jeremy was sending some patches related to this just yesterday or so.. on xen-devel. -- Pasi> Dante > > Here''s the result of lspci -vvv: > 0d:00.0 Fibre Channel: QLogic Corp. ISP2532-based 8Gb Fibre Channel to PCI > Express HBA (rev 02) > Subsystem: QLogic Corp. Device 015d > Control: I/O+ Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- > ParErr- Stepping- SERR- FastB2B- DisINTx- > Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- > <TAbort- <MAbort- >SERR- <PERR- INTx- > Latency: 0, Cache Line Size: 64 bytes > Interrupt: pin A routed to IRQ 30 > Region 0: I/O ports at 5000 [size=256] > Region 1: Memory at fbef0000 (64-bit, non-prefetchable) [size=16K] > Region 3: Memory at fbd00000 (64-bit, non-prefetchable) [size=1M] > Expansion ROM at e4100000 [disabled] [size=256K] > Capabilities: [44] Power Management version 3 > Flags: PMEClk- DSI- D1- D2- AuxCurrent=0mA > PME(D0-,D1-,D2-,D3hot-,D3cold- > ) > Status: D0 PME-Enable- DSel=0 DScale=0 PME- > Capabilities: [4c] Express (v2) Endpoint, MSI 00 > DevCap: MaxPayload 1024 bytes, PhantFunc 0, Latency L0s > <1us, L1 <1us > ExtTag- AttnBtn- AttnInd- PwrInd- RBE+ FLReset+ > DevCtl: Report errors: Correctable- Non-Fatal+ Fatal+ > Unsupported- > RlxdOrd+ ExtTag- PhantFunc- AuxPwr- NoSnoop+ > FLReset- > MaxPayload 128 bytes, MaxReadReq 512 bytes > DevSta: CorrErr- UncorrErr+ FatalErr- UnsuppReq- AuxPwr- > TransPend- > LnkCap: Port #0, Speed 5GT/s, Width x8, ASPM L0s, Latency > L0 <2us, L1 <2us > ClockPM- Suprise- LLActRep- BwNot- > LnkCtl: ASPM Disabled; RCB 64 bytes Disabled- Retrain- > CommClk- > ExtSynch- ClockPM- AutWidDis- BWInt- AutBWInt- > LnkSta: Speed 5GT/s, Width x4, TrErr- Train- SlotClk+ > DLActive- BWMgmt- ABWMgmt- > Capabilities: [88] Message Signalled Interrupts: Mask- 64bit+ > Queue=0/5 Enable- > Address: 00000000fee00000 Data: 402e > Capabilities: [98] Vital Product Data <?> > Capabilities: [a0] MSI-X: Enable+ Mask- TabSize=32 > Vector table: BAR=1 offset=00002000 > PBA: BAR=1 offset=00003000 > Capabilities: [100] Advanced Error Reporting <?> > Capabilities: [138] Power Budgeting <?> > Kernel driver in use: pciback > 0d:00.1 Fibre Channel: QLogic Corp. ISP2532-based 8Gb Fibre Channel to PCI > Express HBA (rev 02) > Subsystem: QLogic Corp. Device 015d > Control: I/O+ Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- > ParErr- Stepping- SERR- FastB2B- DisINTx- > Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- > <TAbort- <MAbort- >SERR- <PERR- INTx- > Latency: 0, Cache Line Size: 64 bytes > Interrupt: pin B routed to IRQ 37 > Region 0: I/O ports at 5400 [size=256] > Region 1: Memory at fbcf0000 (64-bit, non-prefetchable) [size=16K] > Region 3: Memory at fbb00000 (64-bit, non-prefetchable) [size=1M] > Expansion ROM at e4140000 [disabled] [size=256K] > Capabilities: [44] Power Management version 3 > Flags: PMEClk- DSI- D1- D2- AuxCurrent=0mA > PME(D0-,D1-,D2-,D3hot-,D3cold-) > Status: D0 PME-Enable- DSel=0 DScale=0 PME- > Capabilities: [4c] Express (v2) Endpoint, MSI 00 > DevCap: MaxPayload 1024 bytes, PhantFunc 0, Latency L0s > <1us, L1 <1us > ExtTag- AttnBtn- AttnInd- PwrInd- RBE+ FLReset+ > DevCtl: Report errors: Correctable- Non-Fatal+ Fatal+ > Unsupported- > RlxdOrd+ ExtTag- PhantFunc- AuxPwr- NoSnoop+ > FLReset- > MaxPayload 128 bytes, MaxReadReq 512 bytes > DevSta: CorrErr- UncorrErr+ FatalErr- UnsuppReq- AuxPwr- > TransPend- > LnkCap: Port #0, Speed 5GT/s, Width x8, ASPM L0s, Latency > L0 <2us, L1 <2us > ClockPM- Suprise- LLActRep- BwNot- > LnkCtl: ASPM Disabled; RCB 64 bytes Disabled- Retrain- > CommClk- > ExtSynch- ClockPM- AutWidDis- BWInt- AutBWInt- > LnkSta: Speed 5GT/s, Width x4, TrErr- Train- SlotClk+ > DLActive- BWMgmt- ABWMgmt- > Capabilities: [88] Message Signalled Interrupts: Mask- 64bit+ > Queue=0/5 Enable- > Address: 00000000fee00000 Data: 4036 > Capabilities: [98] Vital Product Data <?> > Capabilities: [a0] MSI-X: Enable+ Mask- TabSize=32 > Vector table: BAR=1 offset=00002000 > PBA: BAR=1 offset=00003000 > Capabilities: [100] Advanced Error Reporting <?> > Capabilities: [138] Power Budgeting <?> > Kernel driver in use: pciback > > xend.log: > [2010-05-25 03:00:54 3110] DEBUG (XendDomainInfo:822) > XendDomainInfo.hvm_pci_device_insert_dev: > 0000:0d:00.0@100,msitranslate=1,power_mgmt=0 > [2010-05-25 03:00:54 3110] DEBUG (XendDomainInfo:826) pci: assign device > 0000:0d:00.0@100,msitranslate=1,power_mgmt=0 > [2010-05-25 03:00:54 3110] DEBUG (image:508) signalDeviceModel: orig_state > is None, retrying > [2010-05-25 03:00:54 3110] DEBUG (image:508) signalDeviceModel: orig_state > is None, retrying > [2010-05-25 03:00:54 3110] DEBUG (image:508) signalDeviceModel: orig_state > is None, retrying > [2010-05-25 03:00:54 3110] DEBUG (image:508) signalDeviceModel: orig_state > is None, retrying > [2010-05-25 03:00:55 3110] INFO (image:538) signalDeviceModel:restore dm > state to running > [2010-05-25 03:00:55 3110] INFO (pciquirk:92) NO quirks found for PCI > device [1077:2532:1077:015d] > [2010-05-25 03:00:55 3110] DEBUG (pciquirk:135) Permissive mode NOT > enabled for PCI device [1077:2532:1077:015d] > [2010-05-25 03:00:55 3110] DEBUG (pciif:320) pci: enabling ioport > 0x5000/0x100 > [2010-05-25 03:00:55 3110] DEBUG (pciif:334) pci: enabling iomem > 0xfbef0000/0x4000 pfn 0xfbef0/0x4 > [2010-05-25 03:00:55 3110] DEBUG (pciif:334) pci: enabling iomem > 0xfbd00000/0x100000 pfn 0xfbd00/0x100 > [2010-05-25 03:00:55 3110] DEBUG (pciif:334) pci: enabling iomem > 0x20100000/0x40000 pfn 0x20100/0x40 > [2010-05-25 03:00:55 3110] DEBUG (pciif:351) pci: enabling irq 30 > [2010-05-25 03:00:55 3110] INFO (pciquirk:92) NO quirks found for PCI > device [1077:2532:1077:015d] > [2010-05-25 03:00:55 3110] DEBUG (pciquirk:135) Permissive mode NOT > enabled for PCI device [1077:2532:1077:015d] > [2010-05-25 03:00:55 3110] DEBUG (pciif:320) pci: enabling ioport > 0x5400/0x100 > [2010-05-25 03:00:55 3110] DEBUG (pciif:334) pci: enabling iomem > 0xfbcf0000/0x4000 pfn 0xfbcf0/0x4 > [2010-05-25 03:00:55 3110] DEBUG (pciif:334) pci: enabling iomem > 0xfbb00000/0x100000 pfn 0xfbb00/0x100 > [2010-05-25 03:00:55 3110] DEBUG (pciif:334) pci: enabling iomem > 0x20140000/0x40000 pfn 0x20140/0x40 > [2010-05-25 03:00:55 3110] DEBUG (pciif:351) pci: enabling irq 37 > [2010-05-25 03:00:55 3110] DEBUG (pciif:456) pci: register aer watch > /local/domain/0/backend/pci/1/0/aerState > [2010-05-25 03:00:55 3110] DEBUG (pciif:169) Reconfiguring PCI device > 0000:0d:00.0. > [2010-05-25 03:00:55 3110] INFO (pciquirk:92) NO quirks found for PCI > device [1077:2532:1077:015d] > [2010-05-25 03:00:55 3110] DEBUG (pciquirk:135) Permissive mode NOT > enabled for PCI device [1077:2532:1077:015d] > [2010-05-25 03:00:55 3110] DEBUG (pciif:320) pci: enabling ioport > 0x5000/0x100 > [2010-05-25 03:00:55 3110] DEBUG (pciif:334) pci: enabling iomem > 0xfbef0000/0x4000 pfn 0xfbef0/0x4 > [2010-05-25 03:00:55 3110] DEBUG (pciif:334) pci: enabling iomem > 0xfbd00000/0x100000 pfn 0xfbd00/0x100 > [2010-05-25 03:00:55 3110] DEBUG (pciif:334) pci: enabling iomem > 0x20100000/0x40000 pfn 0x20100/0x40 > [2010-05-25 03:00:55 3110] DEBUG (pciif:351) pci: enabling irq 30 > [2010-05-25 03:00:56 3110] DEBUG (XendDomainInfo:826) pci: assign device > 0000:0d:00.1@100,msitranslate=1,power_mgmt=0 > [2010-05-25 03:00:56 3110] INFO (image:538) signalDeviceModel:restore dm > state to running > [2010-05-25 03:00:56 3110] DEBUG (pciif:169) Reconfiguring PCI device > 0000:0d:00.1. > [2010-05-25 03:00:56 3110] INFO (pciquirk:92) NO quirks found for PCI > device [1077:2532:1077:015d] > [2010-05-25 03:00:56 3110] DEBUG (pciquirk:135) Permissive mode NOT > enabled for PCI device [1077:2532:1077:015d] > [2010-05-25 03:00:56 3110] DEBUG (pciif:320) pci: enabling ioport > 0x5400/0x100 > [2010-05-25 03:00:56 3110] DEBUG (pciif:334) pci: enabling iomem > 0xfbcf0000/0x4000 pfn 0xfbcf0/0x4 > [2010-05-25 03:00:56 3110] DEBUG (pciif:334) pci: enabling iomem > 0xfbb00000/0x100000 pfn 0xfbb00/0x100 > [2010-05-25 03:00:56 3110] DEBUG (pciif:334) pci: enabling iomem > 0x20140000/0x40000 pfn 0x20140/0x40 > [2010-05-25 03:00:56 3110] DEBUG (pciif:351) pci: enabling irq 37 > > qemu-dm-win2008.log: > domid: 2 > config qemu network with xen bridge for tap2.0 eth0 > Using xvda for guest''s hda > Watching /local/domain/0/device-model/2/logdirty/cmd > Watching /local/domain/0/device-model/2/command > char device redirected to /dev/pts/2 > qemu_map_cache_init nr_buckets = 10000 size 4194304 > shared page at pfn feffd > buffered io page at pfn feffb > Guest uuid = 3ed399c0-03b2-442f-2205-546e2c4b7126 > Time offset set 0 > populating video RAM at ff000000 > mapping video RAM from ff000000 > Register xen platform. > Done register platform. > platform_fixed_ioport: changed ro/rw state of ROM memory area. now is rw > state. > xs_read(/local/domain/0/device-model/2/xen_extended_power_mgmt): read > error > xs_read(): vncpasswd get error. > /vm/3ed399c0-03b2-442f-2205-546e2c4b7126/vncpasswd. > Log-dirty: no command yet. > I/O request not ready: 0, ptr: 0, port: 0, data: 0, count: 0, size: 0 > xs_read(/local/domain/2/log-throttling): read error > qemu: ignoring not-understood drive `/local/domain/2/log-throttling'' > medium change watch on `/local/domain/2/log-throttling'' - unknown device, > ignored > dm-command: hot insert pass-through pci dev > register_real_device: Assigning real physical device 0d:00.0 ... > register_real_device: Enable MSI translation via per device option > register_real_device: Disable power management > pt_iomul_init: Error: pt_iomul_init can''t open file /dev/xen/pci_iomul: No > such file or directory: 0xd:0x0.0x0 > pt_register_regions: IO region registered (size=0x00000100 > base_addr=0x00005001) > pt_register_regions: IO region registered (size=0x00004000 > base_addr=0xfbef0004) > pt_register_regions: IO region registered (size=0x00100000 > base_addr=0xfbd00004) > pt_register_regions: Expansion ROM registered (size=0x00040000 > base_addr=0xe4100000) > pt_msix_init: get MSI-X table bar base fbef0000 > pt_msix_init: table_off = 2000, total_entries = 32 > pt_msix_init: errno = 2 > pt_msix_init: mapping physical MSI-X table to 7fcf6feef000 > pt_msi_setup: msi mapped with pirq 4f > pci_intx: intx=1 > register_real_device: Real physical device 0d:00.0 registered successfuly! > IRQ type = MSI-INTx > dm-command: hot insert pass-through pci dev > register_real_device: Assigning real physical device 0d:00.1 ... > register_real_device: Enable MSI translation via per device option > register_real_device: Disable power management > pt_iomul_init: Error: pt_iomul_init can''t open file /dev/xen/pci_iomul: No > such file or directory: 0xd:0x0.0x1 > pt_register_regions: IO region registered (size=0x00000100 > base_addr=0x00005401) > pt_register_regions: IO region registered (size=0x00004000 > base_addr=0xfbcf0004) > pt_register_regions: IO region registered (size=0x00100000 > base_addr=0xfbb00004) > pt_register_regions: Expansion ROM registered (size=0x00040000 > base_addr=0xe4140000) > pt_msix_init: get MSI-X table bar base fbcf0000 > pt_msix_init: table_off = 2000, total_entries = 32 > pt_msix_init: errno = 2 > pt_msix_init: mapping physical MSI-X table to 7fcf6feee000 > pt_msi_setup: msi mapped with pirq 4e > pci_intx: intx=2 > register_real_device: Real physical device 0d:00.1 registered successfuly! > IRQ type = MSI-INTx > cirrus vga map change while on lfb mode > pt_iomem_map: e_phys=f3000000 maddr=fbd00000 type=0 len=1048576 index=3 > first_map=1 > pt_iomem_map: e_phys=f3100000 maddr=fbb00000 type=0 len=1048576 index=3 > first_map=1 > pt_iomem_map: e_phys=f32a0000 maddr=fbef0000 type=0 len=16384 index=1 > first_map=1 > pt_iomem_map: e_phys=f32a4000 maddr=fbcf0000 type=0 len=16384 index=1 > first_map=1 > pt_ioport_map: e_phys=c100 pio_base=5000 len=256 index=0 first_map=1 > pt_ioport_map: e_phys=c200 pio_base=5400 len=256 index=0 first_map=1 > Overlapped to device[00:06.0][Region:6][Address:f3240000h][Size:00040000h] > pt_bar_mapping_one: Warning: > ptdev[00:05.0][Region:6][Address:f3200001h][Size:00040000h] is overlapped. > pt_iomem_map: e_phys=f3200001 maddr=e4100000 type=8 len=262144 index=6 > first_map=1 > pt_iomem_map: e_phys=ffffffff maddr=e4100000 type=8 len=262144 index=6 > first_map=0 > Overlapped to device[00:04.0][Region:0][Address:f3280000h][Size:00020000h] > pt_bar_mapping_one: Warning: > ptdev[00:06.0][Region:6][Address:f3240001h][Size:00040000h] is overlapped. > pt_iomem_map: e_phys=f3240001 maddr=e4140000 type=8 len=262144 index=6 > first_map=1 > pt_iomem_map: e_phys=ffffffff maddr=e4140000 type=8 len=262144 index=6 > first_map=0 > mapping vram to f0000000 - f0400000 > platform_fixed_ioport: changed ro/rw state of ROM memory area. now is rw > state. > platform_fixed_ioport: changed ro/rw state of ROM memory area. now is ro > state. > pt_ioport_map: e_phys=ffff pio_base=5000 len=256 index=0 first_map=0 > pt_iomem_map: e_phys=ffffffff maddr=fbef0000 type=0 len=16384 index=1 > first_map=0 > pt_iomem_map: e_phys=ffffffff maddr=fbd00000 type=0 len=1048576 index=3 > first_map=0 > pt_ioport_map: e_phys=c100 pio_base=5000 len=256 index=0 first_map=0 > pt_iomem_map: e_phys=f32a0000 maddr=fbef0000 type=0 len=16384 index=1 > first_map=0 > pt_iomem_map: e_phys=f3000000 maddr=fbd00000 type=0 len=1048576 index=3 > first_map=0 > pt_ioport_map: e_phys=ffff pio_base=5400 len=256 index=0 first_map=0 > pt_iomem_map: e_phys=ffffffff maddr=fbcf0000 type=0 len=16384 index=1 > first_map=0 > pt_iomem_map: e_phys=ffffffff maddr=fbb00000 type=0 len=1048576 index=3 > first_map=0 > pt_ioport_map: e_phys=c200 pio_base=5400 len=256 index=0 first_map=0 > pt_iomem_map: e_phys=f32a4000 maddr=fbcf0000 type=0 len=16384 index=1 > first_map=0 > pt_iomem_map: e_phys=f3100000 maddr=fbb00000 type=0 len=1048576 index=3 > first_map=0 > pt_ioport_map: e_phys=ffff pio_base=5000 len=256 index=0 first_map=0 > pt_iomem_map: e_phys=ffffffff maddr=fbef0000 type=0 len=16384 index=1 > first_map=0 > pt_iomem_map: e_phys=ffffffff maddr=fbd00000 type=0 len=1048576 index=3 > first_map=0 > pt_ioport_map: e_phys=c100 pio_base=5000 len=256 index=0 first_map=0 > pt_iomem_map: e_phys=f32a0000 maddr=fbef0000 type=0 len=16384 index=1 > first_map=0 > pt_iomem_map: e_phys=f3000000 maddr=fbd00000 type=0 len=1048576 index=3 > first_map=0 > pt_msixctrl_reg_write: guest enabling MSI-X, disable MSI-INTx translation > pci_intx: intx=1 > pt_msix_update_one: Update msix entry 0 with pirq 4d gvec b0 > pt_msix_update_one: Update msix entry 1 with pirq 4c gvec a0 > pt_msix_update_one: Update msix entry 2 with pirq 4b gvec 90 > pt_msix_update_one: Update msix entry 3 with pirq 4a gvec 80 > pt_msix_update_one: Update msix entry 4 with pirq 49 gvec 70 > pt_msix_update_one: Update msix entry 5 with pirq 48 gvec 60 > pt_msix_update_one: Update msix entry 6 with pirq 47 gvec 82 > pt_msix_update_one: Update msix entry 7 with pirq 46 gvec 72 > pt_msix_update_one: Update msix entry 8 with pirq 45 gvec 62 > pt_msix_update_one: Update msix entry 9 with pirq 44 gvec 52 > pt_msix_update_one: Update msix entry a with pirq 43 gvec b3 > pt_msix_update_one: Update msix entry b with pirq 42 gvec a3 > pt_msix_update_one: Update msix entry c with pirq 41 gvec 93 > pt_msix_update_one: Update msix entry d with pirq 40 gvec 83 > pt_msix_update_one: Update msix entry e with pirq 3f gvec 73 > pt_msix_update_one: Update msix entry f with pirq 3e gvec 63 > pt_msix_update_one: Update msix entry 10 with pirq 3d gvec 53 > pt_msix_update_one: Update msix entry 11 with pirq 3c gvec b4 > pt_msix_update_one: Update msix entry 12 with pirq 3b gvec a4 > pt_msix_update_one: Update msix entry 13 with pirq 3a gvec 94 > pt_msix_update_one: Update msix entry 14 with pirq 39 gvec 84 > pt_msix_update_one: Update msix entry 15 with pirq 38 gvec 74 > pt_msix_update_one: Update msix entry 16 with pirq 37 gvec 64 > pt_msix_update_one: Update msix entry 17 with pirq 36 gvec 54 > pt_msix_update_one: Update msix entry 18 with pirq 35 gvec b5 > pt_msix_update_one: Update msix entry 19 with pirq 34 gvec a5 > pt_msix_update_one: Update msix entry 1a with pirq 33 gvec 95 > pt_msix_update_one: Update msix entry 1b with pirq 32 gvec 85 > pt_msix_update_one: Update msix entry 1c with pirq 31 gvec 75 > pt_msix_update_one: Update msix entry 1d with pirq 30 gvec 65 > pt_msix_update_one: Error: Mapping msix entry 1e > pt_msix_update_one: Error: Mapping msix entry 1f > pt_ioport_map: e_phys=ffff pio_base=5400 len=256 index=0 first_map=0 > pt_iomem_map: e_phys=ffffffff maddr=fbcf0000 type=0 len=16384 index=1 > first_map=0 > pt_iomem_map: e_phys=ffffffff maddr=fbb00000 type=0 len=1048576 index=3 > first_map=0 > pt_ioport_map: e_phys=c200 pio_base=5400 len=256 index=0 first_map=0 > pt_iomem_map: e_phys=f32a4000 maddr=fbcf0000 type=0 len=16384 index=1 > first_map=0 > pt_iomem_map: e_phys=f3100000 maddr=fbb00000 type=0 len=1048576 index=3 > first_map=0 > pt_msixctrl_reg_write: guest enabling MSI-X, disable MSI-INTx translation > pci_intx: intx=2 > pt_msix_update_one: Error: Mapping msix entry 0 > pt_msix_update_one: Error: Mapping msix entry 1 > pt_msix_update_one: Error: Mapping msix entry 2 > pt_msix_update_one: Error: Mapping msix entry 3 > pt_msix_update_one: Error: Mapping msix entry 4 > pt_msix_update_one: Error: Mapping msix entry 5 > pt_msix_update_one: Error: Mapping msix entry 6 > pt_msix_update_one: Error: Mapping msix entry 7 > pt_msix_update_one: Error: Mapping msix entry 8 > pt_msix_update_one: Error: Mapping msix entry 9 > pt_msix_update_one: Error: Mapping msix entry a > pt_msix_update_one: Error: Mapping msix entry b > pt_msix_update_one: Error: Mapping msix entry c > pt_msix_update_one: Error: Mapping msix entry d > pt_msix_update_one: Error: Mapping msix entry e > pt_msix_update_one: Error: Mapping msix entry f > pt_msix_update_one: Error: Mapping msix entry 10 > pt_msix_update_one: Error: Mapping msix entry 11 > pt_msix_update_one: Error: Mapping msix entry 12 > pt_msix_update_one: Error: Mapping msix entry 13 > pt_msix_update_one: Error: Mapping msix entry 14 > pt_msix_update_one: Error: Mapping msix entry 15 > pt_msix_update_one: Error: Mapping msix entry 16 > pt_msix_update_one: Error: Mapping msix entry 17 > pt_msix_update_one: Error: Mapping msix entry 18 > pt_msix_update_one: Error: Mapping msix entry 19 > pt_msix_update_one: Error: Mapping msix entry 1a > pt_msix_update_one: Error: Mapping msix entry 1b > pt_msix_update_one: Error: Mapping msix entry 1c > pt_msix_update_one: Error: Mapping msix entry 1d > pt_msix_update_one: Error: Mapping msix entry 1e > pt_msix_update_one: Error: Mapping msix entry 1f > > (XEN) Guest interrupt information: > (XEN) IRQ: 30 affinity:00000000,00000000,00000000,00000001 vec:59 > type=IO-APIC-level status=00000010 in-flight=0 domain-list=2: 30(----), > (XEN) IRQ: 37 affinity:00000000,00000000,00000000,00000001 vec:51 > type=IO-APIC-level status=00000010 in-flight=0 domain-list=2: 37(----), > (XEN) IRQ: 76 affinity:00000000,00000000,00000000,00000001 vec:3e > type=PCI-MSI status=00000050 in-flight=0 domain-list=2: 77(----), > (XEN) IRQ: 77 affinity:00000000,00000000,00000000,00000001 vec:46 > type=PCI-MSI status=00000050 in-flight=0 domain-list=2: 76(----), > (XEN) IRQ: 78 affinity:00000000,00000000,00000000,00000001 vec:4e > type=PCI-MSI status=00000050 in-flight=0 domain-list=2: 75(----), > (XEN) IRQ: 79 affinity:00000000,00000000,00000000,00000001 vec:56 > type=PCI-MSI status=00000050 in-flight=0 domain-list=2: 74(----), > (XEN) IRQ: 80 affinity:00000000,00000000,00000000,00000001 vec:5e > type=PCI-MSI status=00000050 in-flight=0 domain-list=2: 73(----), > (XEN) IRQ: 81 affinity:00000000,00000000,00000000,00000001 vec:66 > type=PCI-MSI status=00000050 in-flight=0 domain-list=2: 72(----), > (XEN) IRQ: 82 affinity:00000000,00000000,00000000,00000001 vec:6e > type=PCI-MSI status=00000050 in-flight=0 domain-list=2: 71(----), > (XEN) IRQ: 83 affinity:00000000,00000000,00000000,00000001 vec:76 > type=PCI-MSI status=00000050 in-flight=0 domain-list=2: 70(----), > (XEN) IRQ: 84 affinity:00000000,00000000,00000000,00000001 vec:7e > type=PCI-MSI status=00000050 in-flight=0 domain-list=2: 69(----), > (XEN) IRQ: 85 affinity:00000000,00000000,00000000,00000001 vec:86 > type=PCI-MSI status=00000050 in-flight=0 domain-list=2: 68(----), > (XEN) IRQ: 86 affinity:00000000,00000000,00000000,00000001 vec:8e > type=PCI-MSI status=00000050 in-flight=0 domain-list=2: 67(----), > (XEN) IRQ: 87 affinity:00000000,00000000,00000000,00000001 vec:96 > type=PCI-MSI status=00000050 in-flight=0 domain-list=2: 66(----), > (XEN) IRQ: 88 affinity:00000000,00000000,00000000,00000001 vec:9e > type=PCI-MSI status=00000050 in-flight=0 domain-list=2: 65(----), > (XEN) IRQ: 89 affinity:00000000,00000000,00000000,00000001 vec:a6 > type=PCI-MSI status=00000050 in-flight=0 domain-list=2: 64(----), > (XEN) IRQ: 90 affinity:00000000,00000000,00000000,00000001 vec:ae > type=PCI-MSI status=00000050 in-flight=0 domain-list=2: 63(----), > (XEN) IRQ: 91 affinity:00000000,00000000,00000000,00000001 vec:b6 > type=PCI-MSI status=00000050 in-flight=0 domain-list=2: 62(----), > (XEN) IRQ: 92 affinity:00000000,00000000,00000000,00000001 vec:be > type=PCI-MSI status=00000050 in-flight=0 domain-list=2: 61(----), > (XEN) IRQ: 93 affinity:00000000,00000000,00000000,00000001 vec:c6 > type=PCI-MSI status=00000050 in-flight=0 domain-list=2: 60(----), > (XEN) IRQ: 94 affinity:00000000,00000000,00000000,00000001 vec:ce > type=PCI-MSI status=00000050 in-flight=0 domain-list=2: 59(----), > (XEN) IRQ: 95 affinity:00000000,00000000,00000000,00000001 vec:d6 > type=PCI-MSI status=00000050 in-flight=0 domain-list=2: 58(----), > (XEN) IRQ: 96 affinity:00000000,00000000,00000000,00000001 vec:de > type=PCI-MSI status=00000050 in-flight=0 domain-list=2: 57(----), > (XEN) IRQ: 97 affinity:00000000,00000000,00000000,00000001 vec:27 > type=PCI-MSI status=00000050 in-flight=0 domain-list=2: 56(----), > (XEN) IRQ: 98 affinity:00000000,00000000,00000000,00000001 vec:2f > type=PCI-MSI status=00000050 in-flight=0 domain-list=2: 55(----), > (XEN) IRQ: 99 affinity:00000000,00000000,00000000,00000001 vec:37 > type=PCI-MSI status=00000050 in-flight=0 domain-list=2: 54(----), > (XEN) IRQ: 100 affinity:00000000,00000000,00000000,00000001 vec:3f > type=PCI-MSI status=00000050 in-flight=0 domain-list=2: 53(----), > (XEN) IRQ: 101 affinity:00000000,00000000,00000000,00000001 vec:47 > type=PCI-MSI status=00000050 in-flight=0 domain-list=2: 52(----), > (XEN) IRQ: 102 affinity:00000000,00000000,00000000,00000001 vec:4f > type=PCI-MSI status=00000050 in-flight=0 domain-list=2: 51(----), > (XEN) IRQ: 103 affinity:00000000,00000000,00000000,00000001 vec:57 > type=PCI-MSI status=00000050 in-flight=0 domain-list=2: 50(----), > (XEN) IRQ: 104 affinity:00000000,00000000,00000000,00000001 vec:5f > type=PCI-MSI status=00000050 in-flight=0 domain-list=2: 49(----), > (XEN) IRQ: 105 affinity:00000000,00000000,00000000,00000001 vec:67 > type=PCI-MSI status=00000050 in-flight=0 domain-list=2: 48(----), > (XEN) PCI-MSI interrupt information: > (XEN) MSI 49 vec=b0 fixed edge assert phys cpu dest=00000000 > mask=1/1/1 > (XEN) MSI 50 vec=b8 fixed edge assert phys cpu dest=00000000 > mask=1/1/1 > (XEN) MSI 51 vec=c0 fixed edge assert phys cpu dest=00000000 > mask=1/1/1 > (XEN) MSI 52 vec=c8 fixed edge assert phys cpu dest=00000000 > mask=1/1/1 > (XEN) MSI 53 vec=d0 fixed edge assert phys cpu dest=00000000 > mask=1/1/1 > (XEN) MSI 54 vec=d8 fixed edge assert phys cpu dest=00000000 > mask=1/1/1 > (XEN) MSI 55 vec=21 fixed edge assert phys cpu dest=00000000 > mask=1/1/1 > (XEN) MSI 56 vec=29 fixed edge assert phys cpu dest=00000000 > mask=1/1/1 > (XEN) MSI 57 vec=31 fixed edge assert phys cpu dest=00000000 > mask=1/1/1 > (XEN) MSI 58 vec=39 fixed edge assert phys cpu dest=00000000 > mask=1/1/1 > (XEN) MSI 59 vec=41 fixed edge assert phys cpu dest=00000000 > mask=0/1/-1 > (XEN) MSI 60 vec=49 fixed edge assert phys cpu dest=00000000 > mask=0/1/-1 > (XEN) MSIX 61 vec=c9 fixed edge assert phys cpu dest=00000000 > mask=1/1/1 > (XEN) MSIX 62 vec=d1 fixed edge assert phys cpu dest=00000000 > mask=1/1/1 > (XEN) MSIX 63 vec=2a fixed edge assert phys cpu dest=00000017 > mask=1/0/0 > (XEN) MSIX 64 vec=22 fixed edge assert phys cpu dest=00000000 > mask=1/1/1 > (XEN) MSIX 65 vec=d2 fixed edge assert phys cpu dest=00000000 > mask=1/0/0 > (XEN) MSIX 66 vec=da fixed edge assert phys cpu dest=00000000 > mask=1/0/0 > (XEN) MSIX 67 vec=23 fixed edge assert phys cpu dest=00000000 > mask=1/0/0 > (XEN) MSIX 68 vec=2b fixed edge assert phys cpu dest=00000000 > mask=1/0/0 > (XEN) MSIX 69 vec=33 fixed edge assert phys cpu dest=00000000 > mask=1/0/0 > (XEN) MSIX 70 vec=3b fixed edge assert phys cpu dest=00000000 > mask=1/0/0 > (XEN) MSIX 71 vec=43 fixed edge assert phys cpu dest=00000000 > mask=1/0/0 > (XEN) MSIX 72 vec=4b fixed edge assert phys cpu dest=00000000 > mask=1/0/0 > (XEN) MSIX 73 vec=53 fixed edge assert phys cpu dest=00000000 > mask=1/1/1 > (XEN) MSI 74 vec=2e fixed edge assert phys cpu dest=00000000 > mask=0/1/-1 > (XEN) MSI 75 vec=36 fixed edge assert phys cpu dest=00000000 > mask=0/1/-1 > (XEN) MSIX 76 vec=3e fixed edge assert phys cpu dest=00000000 > mask=1/0/0 > (XEN) MSIX 77 vec=46 fixed edge assert phys cpu dest=00000000 > mask=1/0/0 > (XEN) MSIX 78 vec=4e fixed edge assert phys cpu dest=00000000 > mask=1/0/0 > (XEN) MSIX 79 vec=56 fixed edge assert phys cpu dest=00000000 > mask=1/0/0 > (XEN) MSIX 80 vec=5e fixed edge assert phys cpu dest=00000000 > mask=1/0/0 > (XEN) MSIX 81 vec=66 fixed edge assert phys cpu dest=00000000 > mask=1/0/0 > (XEN) MSIX 82 vec=6e fixed edge assert phys cpu dest=00000000 > mask=1/0/0 > (XEN) MSIX 83 vec=76 fixed edge assert phys cpu dest=00000000 > mask=1/0/0 > (XEN) MSIX 84 vec=7e fixed edge assert phys cpu dest=00000000 > mask=1/0/0 > (XEN) MSIX 85 vec=86 fixed edge assert phys cpu dest=00000000 > mask=1/0/0 > (XEN) MSIX 86 vec=8e fixed edge assert phys cpu dest=00000000 > mask=1/0/0 > (XEN) MSIX 87 vec=96 fixed edge assert phys cpu dest=00000000 > mask=1/0/0 > (XEN) MSIX 88 vec=9e fixed edge assert phys cpu dest=00000000 > mask=1/0/0 > (XEN) MSIX 89 vec=a6 fixed edge assert phys cpu dest=00000000 > mask=1/0/0 > (XEN) MSIX 90 vec=ae fixed edge assert phys cpu dest=00000000 > mask=1/0/0 > (XEN) MSIX 91 vec=b6 fixed edge assert phys cpu dest=00000000 > mask=1/0/0 > (XEN) MSIX 92 vec=be fixed edge assert phys cpu dest=00000000 > mask=1/0/0 > (XEN) MSIX 93 vec=c6 fixed edge assert phys cpu dest=00000000 > mask=1/0/0 > (XEN) MSIX 94 vec=ce fixed edge assert phys cpu dest=00000000 > mask=1/0/0 > (XEN) MSIX 95 vec=d6 fixed edge assert phys cpu dest=00000000 > mask=1/0/0 > (XEN) MSIX 96 vec=de fixed edge assert phys cpu dest=00000000 > mask=1/0/0 > (XEN) MSIX 97 vec=27 fixed edge assert phys cpu dest=00000000 > mask=1/0/0 > (XEN) MSIX 98 vec=2f fixed edge assert phys cpu dest=00000000 > mask=1/0/0 > (XEN) MSIX 99 vec=37 fixed edge assert phys cpu dest=00000000 > mask=1/0/0 > (XEN) MSIX 100 vec=3f fixed edge assert phys cpu dest=00000000 > mask=1/0/0 > (XEN) MSIX 101 vec=47 fixed edge assert phys cpu dest=00000000 > mask=1/0/0 > (XEN) MSIX 102 vec=4f fixed edge assert phys cpu dest=00000000 > mask=1/0/0 > (XEN) MSIX 103 vec=57 fixed edge assert phys cpu dest=00000000 > mask=1/0/0 > (XEN) MSIX 104 vec=5f fixed edge assert phys cpu dest=00000000 > mask=1/0/0 > (XEN) MSIX 105 vec=67 fixed edge assert phys cpu dest=00000000 > mask=1/0/0 > (XEN) [Q: dump PCI devices] > (XEN) ==== PCI devices ===> (XEN) 0d:00.1 - dom 2 - MSIs < 75 > > (XEN) 0d:00.0 - dom 2 - MSIs < 74 76 77 78 79 80 81 82 83 84 85 86 87 88 > 89 90 91 92 93 94 95 96 97 98 99 100 101 102 103 104 105 >> _______________________________________________ > Xen-users mailing list > Xen-users@lists.xensource.com > http://lists.xensource.com/xen-users_______________________________________________ Xen-users mailing list Xen-users@lists.xensource.com http://lists.xensource.com/xen-users