one rename and one enable patch. Tested on hardware and confirmed with traces
Karol Herbst (2):
pci: Rename g94 to g92
pci/g92: Enable changing pcie link speeds
drm/nouveau/include/nvkm/subdev/pci.h | 2 +-
drm/nouveau/nvkm/engine/device/base.c | 22 +++++++++++-----------
drm/nouveau/nvkm/subdev/pci/Kbuild | 2 +-
drm/nouveau/nvkm/subdev/pci/{g94.c => g92.c} | 10 +++++-----
drm/nouveau/nvkm/subdev/pci/gf100.c | 2 +-
drm/nouveau/nvkm/subdev/pci/gf106.c | 2 +-
drm/nouveau/nvkm/subdev/pci/priv.h | 2 +-
7 files changed, 21 insertions(+), 21 deletions(-)
rename drm/nouveau/nvkm/subdev/pci/{g94.c => g92.c} (87%)
--
2.11.0.rc2
Signed-off-by: Karol Herbst <karolherbst at gmail.com>
---
drm/nouveau/include/nvkm/subdev/pci.h | 2 +-
drm/nouveau/nvkm/engine/device/base.c | 20 ++++++++++----------
drm/nouveau/nvkm/subdev/pci/Kbuild | 2 +-
drm/nouveau/nvkm/subdev/pci/{g94.c => g92.c} | 10 +++++-----
drm/nouveau/nvkm/subdev/pci/gf100.c | 2 +-
drm/nouveau/nvkm/subdev/pci/gf106.c | 2 +-
drm/nouveau/nvkm/subdev/pci/priv.h | 2 +-
7 files changed, 20 insertions(+), 20 deletions(-)
rename drm/nouveau/nvkm/subdev/pci/{g94.c => g92.c} (87%)
diff --git a/drm/nouveau/include/nvkm/subdev/pci.h
b/drm/nouveau/include/nvkm/subdev/pci.h
index e6523e2c..2592d86a 100644
--- a/drm/nouveau/include/nvkm/subdev/pci.h
+++ b/drm/nouveau/include/nvkm/subdev/pci.h
@@ -43,7 +43,7 @@ int nv40_pci_new(struct nvkm_device *, int, struct nvkm_pci
**);
int nv46_pci_new(struct nvkm_device *, int, struct nvkm_pci **);
int nv4c_pci_new(struct nvkm_device *, int, struct nvkm_pci **);
int g84_pci_new(struct nvkm_device *, int, struct nvkm_pci **);
-int g94_pci_new(struct nvkm_device *, int, struct nvkm_pci **);
+int g92_pci_new(struct nvkm_device *, int, struct nvkm_pci **);
int gf100_pci_new(struct nvkm_device *, int, struct nvkm_pci **);
int gf106_pci_new(struct nvkm_device *, int, struct nvkm_pci **);
int gk104_pci_new(struct nvkm_device *, int, struct nvkm_pci **);
diff --git a/drm/nouveau/nvkm/engine/device/base.c
b/drm/nouveau/nvkm/engine/device/base.c
index bd22526e..7307ee1f 100644
--- a/drm/nouveau/nvkm/engine/device/base.c
+++ b/drm/nouveau/nvkm/engine/device/base.c
@@ -1025,7 +1025,7 @@ nv94_chipset = {
.mc = g84_mc_new,
.mmu = nv50_mmu_new,
.mxm = nv50_mxm_new,
- .pci = g94_pci_new,
+ .pci = g92_pci_new,
.therm = g84_therm_new,
.timer = nv41_timer_new,
.volt = nv40_volt_new,
@@ -1057,7 +1057,7 @@ nv96_chipset = {
.mc = g84_mc_new,
.mmu = nv50_mmu_new,
.mxm = nv50_mxm_new,
- .pci = g94_pci_new,
+ .pci = g92_pci_new,
.therm = g84_therm_new,
.timer = nv41_timer_new,
.volt = nv40_volt_new,
@@ -1089,7 +1089,7 @@ nv98_chipset = {
.mc = g98_mc_new,
.mmu = nv50_mmu_new,
.mxm = nv50_mxm_new,
- .pci = g94_pci_new,
+ .pci = g92_pci_new,
.therm = g84_therm_new,
.timer = nv41_timer_new,
.volt = nv40_volt_new,
@@ -1121,7 +1121,7 @@ nva0_chipset = {
.mc = g84_mc_new,
.mmu = nv50_mmu_new,
.mxm = nv50_mxm_new,
- .pci = g94_pci_new,
+ .pci = g92_pci_new,
.therm = g84_therm_new,
.timer = nv41_timer_new,
.volt = nv40_volt_new,
@@ -1153,7 +1153,7 @@ nva3_chipset = {
.mc = gt215_mc_new,
.mmu = nv50_mmu_new,
.mxm = nv50_mxm_new,
- .pci = g94_pci_new,
+ .pci = g92_pci_new,
.pmu = gt215_pmu_new,
.therm = gt215_therm_new,
.timer = nv41_timer_new,
@@ -1187,7 +1187,7 @@ nva5_chipset = {
.mc = gt215_mc_new,
.mmu = nv50_mmu_new,
.mxm = nv50_mxm_new,
- .pci = g94_pci_new,
+ .pci = g92_pci_new,
.pmu = gt215_pmu_new,
.therm = gt215_therm_new,
.timer = nv41_timer_new,
@@ -1220,7 +1220,7 @@ nva8_chipset = {
.mc = gt215_mc_new,
.mmu = nv50_mmu_new,
.mxm = nv50_mxm_new,
- .pci = g94_pci_new,
+ .pci = g92_pci_new,
.pmu = gt215_pmu_new,
.therm = gt215_therm_new,
.timer = nv41_timer_new,
@@ -1253,7 +1253,7 @@ nvaa_chipset = {
.mc = g98_mc_new,
.mmu = nv50_mmu_new,
.mxm = nv50_mxm_new,
- .pci = g94_pci_new,
+ .pci = g92_pci_new,
.therm = g84_therm_new,
.timer = nv41_timer_new,
.volt = nv40_volt_new,
@@ -1285,7 +1285,7 @@ nvac_chipset = {
.mc = g98_mc_new,
.mmu = nv50_mmu_new,
.mxm = nv50_mxm_new,
- .pci = g94_pci_new,
+ .pci = g92_pci_new,
.therm = g84_therm_new,
.timer = nv41_timer_new,
.volt = nv40_volt_new,
@@ -1317,7 +1317,7 @@ nvaf_chipset = {
.mc = gt215_mc_new,
.mmu = nv50_mmu_new,
.mxm = nv50_mxm_new,
- .pci = g94_pci_new,
+ .pci = g92_pci_new,
.pmu = gt215_pmu_new,
.therm = gt215_therm_new,
.timer = nv41_timer_new,
diff --git a/drm/nouveau/nvkm/subdev/pci/Kbuild
b/drm/nouveau/nvkm/subdev/pci/Kbuild
index 2a31b7d6..cdb7ce22 100644
--- a/drm/nouveau/nvkm/subdev/pci/Kbuild
+++ b/drm/nouveau/nvkm/subdev/pci/Kbuild
@@ -6,7 +6,7 @@ nvkm-y += nvkm/subdev/pci/nv40.o
nvkm-y += nvkm/subdev/pci/nv46.o
nvkm-y += nvkm/subdev/pci/nv4c.o
nvkm-y += nvkm/subdev/pci/g84.o
-nvkm-y += nvkm/subdev/pci/g94.o
+nvkm-y += nvkm/subdev/pci/g92.o
nvkm-y += nvkm/subdev/pci/gf100.o
nvkm-y += nvkm/subdev/pci/gf106.o
nvkm-y += nvkm/subdev/pci/gk104.o
diff --git a/drm/nouveau/nvkm/subdev/pci/g94.c
b/drm/nouveau/nvkm/subdev/pci/g92.c
similarity index 87%
rename from drm/nouveau/nvkm/subdev/pci/g94.c
rename to drm/nouveau/nvkm/subdev/pci/g92.c
index 43444123..654607e0 100644
--- a/drm/nouveau/nvkm/subdev/pci/g94.c
+++ b/drm/nouveau/nvkm/subdev/pci/g92.c
@@ -24,7 +24,7 @@
#include "priv.h"
int
-g94_pcie_version_supported(struct nvkm_pci *pci)
+g92_pcie_version_supported(struct nvkm_pci *pci)
{
if ((nvkm_pci_rd32(pci, 0x460) & 0x200) == 0x200)
return 2;
@@ -32,7 +32,7 @@ g94_pcie_version_supported(struct nvkm_pci *pci)
}
static const struct nvkm_pci_func
-g94_pci_func = {
+g92_pci_func = {
.init = g84_pci_init,
.rd32 = nv40_pci_rd32,
.wr08 = nv40_pci_wr08,
@@ -47,11 +47,11 @@ g94_pci_func = {
.pcie.set_version = g84_pcie_set_version,
.pcie.version = g84_pcie_version,
- .pcie.version_supported = g94_pcie_version_supported,
+ .pcie.version_supported = g92_pcie_version_supported,
};
int
-g94_pci_new(struct nvkm_device *device, int index, struct nvkm_pci **ppci)
+g92_pci_new(struct nvkm_device *device, int index, struct nvkm_pci **ppci)
{
- return nvkm_pci_new_(&g94_pci_func, device, index, ppci);
+ return nvkm_pci_new_(&g92_pci_func, device, index, ppci);
}
diff --git a/drm/nouveau/nvkm/subdev/pci/gf100.c
b/drm/nouveau/nvkm/subdev/pci/gf100.c
index e30ea676..00a5e7d3 100644
--- a/drm/nouveau/nvkm/subdev/pci/gf100.c
+++ b/drm/nouveau/nvkm/subdev/pci/gf100.c
@@ -92,7 +92,7 @@ gf100_pci_func = {
.pcie.set_version = gf100_pcie_set_version,
.pcie.version = gf100_pcie_version,
- .pcie.version_supported = g94_pcie_version_supported,
+ .pcie.version_supported = g92_pcie_version_supported,
};
int
diff --git a/drm/nouveau/nvkm/subdev/pci/gf106.c
b/drm/nouveau/nvkm/subdev/pci/gf106.c
index c3b798c5..11bf419a 100644
--- a/drm/nouveau/nvkm/subdev/pci/gf106.c
+++ b/drm/nouveau/nvkm/subdev/pci/gf106.c
@@ -39,7 +39,7 @@ gf106_pci_func = {
.pcie.set_version = gf100_pcie_set_version,
.pcie.version = gf100_pcie_version,
- .pcie.version_supported = g94_pcie_version_supported,
+ .pcie.version_supported = g92_pcie_version_supported,
};
int
diff --git a/drm/nouveau/nvkm/subdev/pci/priv.h
b/drm/nouveau/nvkm/subdev/pci/priv.h
index 23de3180..86921ec9 100644
--- a/drm/nouveau/nvkm/subdev/pci/priv.h
+++ b/drm/nouveau/nvkm/subdev/pci/priv.h
@@ -44,7 +44,7 @@ enum nvkm_pcie_speed g84_pcie_max_speed(struct nvkm_pci *);
int g84_pcie_init(struct nvkm_pci *);
int g84_pcie_set_link(struct nvkm_pci *, enum nvkm_pcie_speed, u8);
-int g94_pcie_version_supported(struct nvkm_pci *);
+int g92_pcie_version_supported(struct nvkm_pci *);
void gf100_pcie_set_version(struct nvkm_pci *, u8);
int gf100_pcie_version(struct nvkm_pci *);
--
2.11.0.rc2
Karol Herbst
2016-Nov-19 23:43 UTC
[Nouveau] [PATCH 2/2] pci/g92: Enable changing pcie link speeds
Tested on a G92, seems to work. Confirmed by 8 mmiotraces.
Signed-off-by: Karol Herbst <karolherbst at gmail.com>
---
drm/nouveau/nvkm/engine/device/base.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drm/nouveau/nvkm/engine/device/base.c
b/drm/nouveau/nvkm/engine/device/base.c
index 7307ee1f..5a16b5a9 100644
--- a/drm/nouveau/nvkm/engine/device/base.c
+++ b/drm/nouveau/nvkm/engine/device/base.c
@@ -993,7 +993,7 @@ nv92_chipset = {
.mc = g84_mc_new,
.mmu = nv50_mmu_new,
.mxm = nv50_mxm_new,
- .pci = g84_pci_new,
+ .pci = g92_pci_new,
.therm = g84_therm_new,
.timer = nv41_timer_new,
.volt = nv40_volt_new,
--
2.11.0.rc2
Karol Herbst
2017-Jan-07 17:49 UTC
[Nouveau] Fwd: [PATCH 0/2] Enable changing PCIe link on G92
ping on that series
---------- Forwarded message ----------
From: Karol Herbst <karolherbst at gmail.com>
Date: 2016-11-20 0:43 GMT+01:00
Subject: [PATCH 0/2] Enable changing PCIe link on G92
To: nouveau at lists.freedesktop.org
one rename and one enable patch. Tested on hardware and confirmed with traces
Karol Herbst (2):
pci: Rename g94 to g92
pci/g92: Enable changing pcie link speeds
drm/nouveau/include/nvkm/subdev/pci.h | 2 +-
drm/nouveau/nvkm/engine/device/base.c | 22 +++++++++++-----------
drm/nouveau/nvkm/subdev/pci/Kbuild | 2 +-
drm/nouveau/nvkm/subdev/pci/{g94.c => g92.c} | 10 +++++-----
drm/nouveau/nvkm/subdev/pci/gf100.c | 2 +-
drm/nouveau/nvkm/subdev/pci/gf106.c | 2 +-
drm/nouveau/nvkm/subdev/pci/priv.h | 2 +-
7 files changed, 21 insertions(+), 21 deletions(-)
rename drm/nouveau/nvkm/subdev/pci/{g94.c => g92.c} (87%)
--
2.11.0.rc2