search for: nv50_mxm_new

...ff --git a/drm/nouveau/nvkm/engine/device/base.c b/drm/nouveau/nvkm/engine/device/base.c index f40273cd..273562dd 100644 --- a/drm/nouveau/nvkm/engine/device/base.c +++ b/drm/nouveau/nvkm/engine/device/base.c @@ -1025,7 +1025,7 @@ nv94_chipset = { .mc = g84_mc_new, .mmu = nv50_mmu_new, .mxm = nv50_mxm_new, - .pci = g92_pci_new, + .pci = g94_pci_new, .therm = g84_therm_new, .timer = nv41_timer_new, .volt = nv40_volt_new, @@ -1057,7 +1057,7 @@ nv96_chipset = { .mc = g84_mc_new, .mmu = nv50_mmu_new, .mxm = nv50_mxm_new, - .pci = g92_pci_new, + .pci = g94_pci_new, .therm = g84_therm_new,...

one rename and one enable patch. Tested on hardware and confirmed with traces Karol Herbst (2): pci: Rename g94 to g92 pci/g92: Enable changing pcie link speeds drm/nouveau/include/nvkm/subdev/pci.h | 2 +- drm/nouveau/nvkm/engine/device/base.c | 22 +++++++++++----------- drm/nouveau/nvkm/subdev/pci/Kbuild | 2 +- drm/nouveau/nvkm/subdev/pci/{g94.c => g92.c} |

...ice *, int, struct nvkm_therm **); #endif diff --git a/drm/nouveau/nvkm/engine/device/base.c b/drm/nouveau/nvkm/engine/device/base.c index 7476ac2..7ec9167 100644 --- a/drm/nouveau/nvkm/engine/device/base.c +++ b/drm/nouveau/nvkm/engine/device/base.c @@ -1354,7 +1354,7 @@ nvc0_chipset = { .mxm = nv50_mxm_new, .pci = gf100_pci_new, .pmu = gf100_pmu_new, - .therm = gt215_therm_new, + .therm = gf100_therm_new, .timer = nv41_timer_new, .volt = nv40_volt_new, .ce[0] = gf100_ce_new, @@ -1390,7 +1390,7 @@ nvc1_chipset = { .mxm = nv50_mxm_new, .pci = g94_pci_new, .pmu = gf100_pmu_new, - .therm...

...--git a/drivers/gpu/drm/nouveau/nvkm/engine/device/base.c b/drivers/gpu/drm/nouveau/nvkm/engine/device/base.c index b690bc1..d133016 100644 --- a/drivers/gpu/drm/nouveau/nvkm/engine/device/base.c +++ b/drivers/gpu/drm/nouveau/nvkm/engine/device/base.c @@ -1355,7 +1355,7 @@ nvc0_chipset = { .mxm = nv50_mxm_new, .pci = gf100_pci_new, .pmu = gf100_pmu_new, - .therm = gt215_therm_new, + .therm = gf100_therm_new, .timer = nv41_timer_new, .volt = gf100_volt_new, .ce[0] = gf100_ce_new, @@ -1392,7 +1392,7 @@ nvc1_chipset = { .mxm = nv50_mxm_new, .pci = gf106_pci_new, .pmu = gf100_pmu_new, - .the...

...; b/drivers/gpu/drm/nouveau/nvkm/engine/device/base.c > > index b690bc1..d133016 100644 > > --- a/drivers/gpu/drm/nouveau/nvkm/engine/device/base.c > > +++ b/drivers/gpu/drm/nouveau/nvkm/engine/device/base.c > > @@ -1355,7 +1355,7 @@ nvc0_chipset = { > >         .mxm = nv50_mxm_new, > >         .pci = gf100_pci_new, > >         .pmu = gf100_pmu_new, > > -       .therm = gt215_therm_new, > > +       .therm = gf100_therm_new, > >         .timer = nv41_timer_new, > >         .volt = gf100_volt_new, > >         .ce[0] = gf100_ce_new, >...

...--git a/drivers/gpu/drm/nouveau/nvkm/engine/device/base.c b/drivers/gpu/drm/nouveau/nvkm/engine/device/base.c index b690bc1..d133016 100644 --- a/drivers/gpu/drm/nouveau/nvkm/engine/device/base.c +++ b/drivers/gpu/drm/nouveau/nvkm/engine/device/base.c @@ -1355,7 +1355,7 @@ nvc0_chipset = { .mxm = nv50_mxm_new, .pci = gf100_pci_new, .pmu = gf100_pmu_new, - .therm = gt215_therm_new, + .therm = gf100_therm_new, .timer = nv41_timer_new, .volt = gf100_volt_new, .ce[0] = gf100_ce_new, @@ -1392,7 +1392,7 @@ nvc1_chipset = { .mxm = nv50_mxm_new, .pci = gf106_pci_new, .pmu = gf100_pmu_new, - .the...

overall it is for the most part the same as my older version. I cleaned up some copyright things, so that it is more like the others. Also I moved the print about the max speed supported into preinit and did some other minor cleanups in the 3rd commit. Happy testing (and performance for prime offloading setups) Karol Herbst (9): pci: add gk104 variant pci: add gf106 variant pci: implement

.../nvkm/engine/device/base.c b/drivers/gpu/drm/nouveau/nvkm/engine/device/base.c > index b690bc1..d133016 100644 > --- a/drivers/gpu/drm/nouveau/nvkm/engine/device/base.c > +++ b/drivers/gpu/drm/nouveau/nvkm/engine/device/base.c > @@ -1355,7 +1355,7 @@ nvc0_chipset = { > .mxm = nv50_mxm_new, > .pci = gf100_pci_new, > .pmu = gf100_pmu_new, > - .therm = gt215_therm_new, > + .therm = gf100_therm_new, > .timer = nv41_timer_new, > .volt = gf100_volt_new, > .ce[0] = gf100_ce_new, > @@ -1392,7 +1392,7 @@ nvc1_chipset...

...ce/base.c > @@ -28,6 +28,7 @@ > #include <core/option.h> > > #include <subdev/bios.h> > +#include <subdev/therm.h> > > static DEFINE_MUTEX(nv_devices_mutex); > static LIST_HEAD(nv_devices); > @@ -1682,7 +1683,7 @@ nve4_chipset = { > .mxm = nv50_mxm_new, > .pci = gk104_pci_new, > .pmu = gk104_pmu_new, > - .therm = gf119_therm_new, > + .therm = gk104_therm_new, > .timer = nv41_timer_new, > .top = gk104_top_new, > .volt = gk104_volt_new, > @@ -1721,7 +1722,7 @@ nve6_chipset...

...ase.c +++ b/drivers/gpu/drm/nouveau/nvkm/engine/device/base.c @@ -28,6 +28,7 @@ #include <core/option.h> #include <subdev/bios.h> +#include <subdev/therm.h> static DEFINE_MUTEX(nv_devices_mutex); static LIST_HEAD(nv_devices); @@ -1682,7 +1683,7 @@ nve4_chipset = { .mxm = nv50_mxm_new, .pci = gk104_pci_new, .pmu = gk104_pmu_new, - .therm = gf119_therm_new, + .therm = gk104_therm_new, .timer = nv41_timer_new, .top = gk104_top_new, .volt = gk104_volt_new, @@ -1721,7 +1722,7 @@ nve6_chipset = { .mxm = nv50_mxm_new, .pci = gk104_pci_new, .pmu = gk104_pmu_new, - .ther...

...ase.c +++ b/drivers/gpu/drm/nouveau/nvkm/engine/device/base.c @@ -28,6 +28,7 @@ #include <core/option.h> #include <subdev/bios.h> +#include <subdev/therm.h> static DEFINE_MUTEX(nv_devices_mutex); static LIST_HEAD(nv_devices); @@ -1682,7 +1683,7 @@ nve4_chipset = { .mxm = nv50_mxm_new, .pci = gk104_pci_new, .pmu = gk104_pmu_new, - .therm = gf119_therm_new, + .therm = gk104_therm_new, .timer = nv41_timer_new, .top = gk104_top_new, .volt = gk104_volt_new, @@ -1721,7 +1722,7 @@ nve6_chipset = { .mxm = nv50_mxm_new, .pci = gk104_pci_new, .pmu = gk104_pmu_new, - .ther...

...ase.c +++ b/drivers/gpu/drm/nouveau/nvkm/engine/device/base.c @@ -28,6 +28,7 @@ #include <core/option.h> #include <subdev/bios.h> +#include <subdev/therm.h> static DEFINE_MUTEX(nv_devices_mutex); static LIST_HEAD(nv_devices); @@ -1682,7 +1683,7 @@ nve4_chipset = { .mxm = nv50_mxm_new, .pci = gk104_pci_new, .pmu = gk104_pmu_new, - .therm = gf119_therm_new, + .therm = gk104_therm_new, .timer = nv41_timer_new, .top = gk104_top_new, .volt = gk104_volt_new, @@ -1721,7 +1722,7 @@ nve6_chipset = { .mxm = nv50_mxm_new, .pci = gk104_pci_new, .pmu = gk104_pmu_new, - .ther...

...*, int, struct nvkm_therm **); #endif diff --git a/drm/nouveau/nvkm/engine/device/base.c b/drm/nouveau/nvkm/engine/device/base.c index 7bdc7a5a..39fdafed 100644 --- a/drm/nouveau/nvkm/engine/device/base.c +++ b/drm/nouveau/nvkm/engine/device/base.c @@ -2043,6 +2043,7 @@ nv120_chipset = { .mxm = nv50_mxm_new, .pci = gk104_pci_new, .pmu = gm107_pmu_new, + .therm = gm200_therm_new, .secboot = gm200_secboot_new, .timer = gk20a_timer_new, .top = gk104_top_new, @@ -2077,6 +2078,7 @@ nv124_chipset = { .mxm = nv50_mxm_new, .pci = gk104_pci_new, .pmu = gm107_pmu_new, + .therm = gm200_therm_new,...

...uveau/nvkm/engine/device/base.c b/drivers/gpu/drm/nouveau/nvkm/engine/device/base.c > index b690bc1..d133016 100644 > --- a/drivers/gpu/drm/nouveau/nvkm/engine/device/base.c > +++ b/drivers/gpu/drm/nouveau/nvkm/engine/device/base.c > @@ -1355,7 +1355,7 @@ nvc0_chipset = { > .mxm = nv50_mxm_new, > .pci = gf100_pci_new, > .pmu = gf100_pmu_new, > - .therm = gt215_therm_new, > + .therm = gf100_therm_new, > .timer = nv41_timer_new, > .volt = gf100_volt_new, > .ce[0] = gf100_ce_new, > @@ -1392,7 +1392,7 @@ nvc1_chipset = { > .mxm = nv50_mxm_new, &gt...

this patch series implements PCIe speed changes for Tesla and newer. The Kepler and Fermi bits are tested on my cards at home. Karol Herbst (9): pci: add gk104 variant pci: add gf106 variant pci: implement generic code for PCIe speed change pci: implement pcie speed change for tesla pci: implement pcie speed change on Fermi pci: implement PCIe speed change for kepler+ bios/perf:

overall the same as the old stuff, but with better namings and tirivialy improved code here and there Karol Herbst (9): pci: add gk104 variant pci: add gf106 variant pci: implement generic code for PCIe speed change pci: implement pcie speed change for tesla pci: implement pcie speed change on Fermi pci: implement PCIe speed change for kepler+ bios/perf: parse the pci speed from the

Next version of my patchseries for adding clockgating support for kepler1 and 2 on nouveau. The first version of this series can be found here: https://patchwork.freedesktop.org/series/36504/ Some minor changes: - Clarified that SLCG stands for 'secondary level clockgating', thanks for the small tip nvidia! - Removed the concept of levels, this was more useful for debugging then

It's here! After a lot of investigation, rewrites, and traces, I present the patch series to implement all known levels of clockgating for Kepler1 and Kepler2 GPUs. Starting with Fermi GPUs (this is probably present on earlier GPUs as well, but with a far less easy to manage interface), nvidia added two clockgating levels that are handled mostly in firmware (with the exception of course, of

Next version of my patchseries for adding clockgating support for kepler1 and 2 on nouveau. The first version of this series can be found here: https://patchwork.freedesktop.org/series/36504/ Some very important changes: - Fix gf100_clkgate_init() to actually write registers! This got broken in the last version by accident - Dump the register packs and the resulting register writes into

Next version of my patchseries for adding clockgating support for kepler1 and 2 on nouveau. The first version of this series can be found here: https://patchwork.freedesktop.org/series/36504/ One small change: - Set therm->clkgate_enabled to false until the last patch, where we introduce the NvPmEnableGating option Lyude Paul (5): drm/nouveau: Add support for basic clockgating on