Jyoti Rajendra Allur
2015-May-28 17:37 UTC
[LLVMdev] [ARM backend] adding pattern for SMLALBB
Hi James/Tim, I am trying to add a patterns for SMLALBB I think these two assembly patterns can be reduced to SMLALBB using tablegen. 1) smulbb r2, r3, r2 adds r0, r2, r0 (RdLo) asr r3, r2, #31 adc r1, r3, r1 (RdHi) ==> smlalbb r0, r1, r3, r2 I have added pattern in def SMLALBB : AMulxyI64< ..... as below :- [] modified to ---> [((set GPR:$RdLo, (ARMaddc (set GPR:$Rd, mul GPR:$Rn, GPR:$Rm), GPR:$RdLo)), (set GPR:$RdHi, (ARMadde (sra GPR:$Rd, (i32 31)), GPR:$RdHi, CPSR)))] This results in 'expected identifier in dag init' error. Obviously something is wrong in this pattern, I have not figured out what that is ? 2) ldrb r2, [r2] ldrb r3, [r3] smlal r0, r1, r3, r2 ==> smlalbb r0, r1, r3, r2 def : ARMV5MOPat<(smlal GPRnopc:$RdLo, GPRnopc:$RdHi, (sra (shl GPR:$a, (i32 24)), (i32 24)), (sra (shl GPR:$b, (i32 24)), (i32 24))), (SMLALBB GPRnopc:$RdLo, GPRnopc:$RdHi, GPRnopc:$Rn, GPRnopc:Rm)>; This throws "Variable not defined: 'smlal' Any pointers on these would be helpful. Regards, Jyoti Allur
Hi Jyoti,> Obviously something is wrong in this pattern, I have not figured out what that is ?The biggest problem is you're trying to define two separate values (RdLo and RdHi). I don't think TableGen supports that yet (I thought someone had done something recently, but can't find any trace of it). If so, you'll need to use C++ to match those patterns.> def : ARMV5MOPat<(smlal GPRnopc:$RdLo, GPRnopc:$RdHi, > (sra (shl GPR:$a, (i32 24)), (i32 24)), > (sra (shl GPR:$b, (i32 24)), (i32 24))), > (SMLALBB GPRnopc:$RdLo, GPRnopc:$RdHi, GPRnopc:$Rn, GPRnopc:Rm)>; > > This throws "Variable not defined: 'smlal'There is no smlal TableGen node, there's an SMLAL instruction, but you can't use that as part of an input pattern because selection occurs only once and bottom-up. Again, I think C++ is your only option here (the 64-bit values are just not legal enough to effectively use TableGen on). Cheers. Tim.
Maybe Matching Threads
- [LLVMdev] ARM cross compiling causes segmentation fault
- [LLVMdev] ARM cross compiling causes segmentation fault
- [LLVMdev] ARM cross compiling causes segmentation fault
- [LLVMdev] ARM cross compiling causes segmentation fault
- [LLVMdev] ARM cross compiling causes segmentation fault