Hi all,
I have a sample test case :
$ cat 1.c
int foo(int x, int y){
int z = x + y;
return z/2;
}
I tried to get its IR form with clang providing subtarget feature as mmx
for target x86_64
$ clang -O3 -mmmx 1.c -S -emit-llvm
in the IR generated i can see the subtarget-features as function attribute :
"target-features"="+mmx"
In the SelectionDAG phase in file "X86ISelLowering.cpp", i checked in
one
of the function what is the subtarget feature by calling few routines of
Subtarget.
Subtarget->hasMMX() ------ true
Subtarget->hasSSE1() ------ true
Subtarget->hasSSE2() ------ true
These functions just compare the X86SSELevel with subtarget enum values
like MMX, SSE1, SSE2 etc.
hasMMX() { return X86SSELevel >= MMX}; // similar for others
Now, enum values start from MMX and goes on increasing with SSE1, SSE2,
etc.
For the above test case, the X86SSELevel is set to SSE2, which is
confusing, since i have explicitly specified the target feature as
'mmx'.
Why the X86SSELevel is getting set to SSE2 despite providing target-feature
as mmx? Is it something to do with default feature of x86_64?
I wanted to distinguish my code generation based on subtarget feature for
MMX and SSE, which i am unable to do so currently because of above scenario.
I am sure i am missing something fundamental, but unable to exactly find
out what.
Can someone please help me out on above question?
Thanks.
Regards,
Suyog Sarda
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For x86_64 ABI, a minimum feature set of SSE2 is required.
Kevin
From: llvmdev-bounces at cs.uiuc.edu [mailto:llvmdev-bounces at cs.uiuc.edu] On
Behalf Of suyog sarda
Sent: Thursday, April 09, 2015 11:27 AM
To: LLVM Developers Mailing List; David Majnemer; Sanjay Patel
Subject: [LLVMdev] MMX/SSE subtarget feature in IR
Hi all,
I have a sample test case :
$ cat 1.c
int foo(int x, int y){
int z = x + y;
return z/2;
}
I tried to get its IR form with clang providing subtarget feature as mmx for
target x86_64
$ clang -O3 -mmmx 1.c -S -emit-llvm
in the IR generated i can see the subtarget-features as function attribute :
"target-features"="+mmx"
In the SelectionDAG phase in file "X86ISelLowering.cpp", i checked in
one of the function what is the subtarget feature by calling few routines of
Subtarget.
Subtarget->hasMMX() ------ true
Subtarget->hasSSE1() ------ true
Subtarget->hasSSE2() ------ true
These functions just compare the X86SSELevel with subtarget enum values like
MMX, SSE1, SSE2 etc.
hasMMX() { return X86SSELevel >= MMX}; // similar for others
Now, enum values start from MMX and goes on increasing with SSE1, SSE2, etc.
For the above test case, the X86SSELevel is set to SSE2, which is confusing,
since i have explicitly specified the target feature as 'mmx'. Why the
X86SSELevel is getting set to SSE2 despite providing target-feature as mmx? Is
it something to do with default feature of x86_64?
I wanted to distinguish my code generation based on subtarget feature for MMX
and SSE, which i am unable to do so currently because of above scenario.
I am sure i am missing something fundamental, but unable to exactly find out
what.
Can someone please help me out on above question?
Thanks.
Regards,
Suyog Sarda
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Thanks Kevin for the reply. I got the point now :) On 10 Apr 2015 00:18, "Smith, Kevin B" <kevin.b.smith at intel.com> wrote:> For x86_64 ABI, a minimum feature set of SSE2 is required. > > > > Kevin > > > > *From:* llvmdev-bounces at cs.uiuc.edu [mailto:llvmdev-bounces at cs.uiuc.edu] *On > Behalf Of *suyog sarda > *Sent:* Thursday, April 09, 2015 11:27 AM > *To:* LLVM Developers Mailing List; David Majnemer; Sanjay Patel > *Subject:* [LLVMdev] MMX/SSE subtarget feature in IR > > > > Hi all, > > > > I have a sample test case : > > > > $ cat 1.c > > > > int foo(int x, int y){ > > int z = x + y; > > return z/2; > > } > > > > I tried to get its IR form with clang providing subtarget feature as mmx > for target x86_64 > > > > $ clang -O3 -mmmx 1.c -S -emit-llvm > > > > in the IR generated i can see the subtarget-features as function attribute > : > > > > "target-features"="+mmx" > > > > In the SelectionDAG phase in file "X86ISelLowering.cpp", i checked in one > of the function what is the subtarget feature by calling few routines of > Subtarget. > > > > Subtarget->hasMMX() ------ true > > Subtarget->hasSSE1() ------ true > > Subtarget->hasSSE2() ------ true > > > > These functions just compare the X86SSELevel with subtarget enum values > like MMX, SSE1, SSE2 etc. > > > > hasMMX() { return X86SSELevel >= MMX}; // similar for others > > > > Now, enum values start from MMX and goes on increasing with SSE1, SSE2, > etc. > > > > For the above test case, the X86SSELevel is set to SSE2, which is > confusing, since i have explicitly specified the target feature as 'mmx'. > Why the X86SSELevel is getting set to SSE2 despite providing target-feature > as mmx? Is it something to do with default feature of x86_64? > > > > I wanted to distinguish my code generation based on subtarget feature for > MMX and SSE, which i am unable to do so currently because of above scenario. > > > > I am sure i am missing something fundamental, but unable to exactly find > out what. > > > > Can someone please help me out on above question? > > > > Thanks. > > > > Regards, > > Suyog Sarda >-------------- next part -------------- An HTML attachment was scrubbed... URL: <http://lists.llvm.org/pipermail/llvm-dev/attachments/20150410/cfdb53c4/attachment.html>