search for: suyog

Displaying 20 results from an estimated 56 matches for "suyog".

2014 Aug 08
4
[LLVMdev] Efficient Pattern matching in Instruction Combine
...iate pass which should handle this. But following is something interesting and rather worrying things i have found : (I have omitted unimportant code and highlighted important one in following example) *e.x. * ((~A & B) | A) --> (A | B) ; Code is implemented for this already *C code :* suyog at suyog-Inspiron-N5010:~$ cat 1.c #include<stdio.h> int cal(int a, int b) { *return ((~a & b) | a);* } int main(){ int a, b; scanf("%d %d", &a, &b); return cal(a,b); } LLVM IR at O0 : suyog at suyog-Inspiron-N5010:~$ Open/rbuild/bin/clang -S -O0 -emit-llvm 1.c ; Fun...
2014 Aug 13
2
[LLVMdev] Efficient Pattern matching in Instruction Combine
Thanks Sean for the reference. I will go through it and see if i can implement it for generic boolean expression minimization. Regards, Suyog On Wed, Aug 13, 2014 at 2:30 AM, Sean Silva <chisophugis at gmail.com> wrote: > Re-adding the mailing list (remember to hit "reply all") > > > On Tue, Aug 12, 2014 at 9:36 AM, suyog sarda <sardask01 at gmail.com> wrote: > >> Thanks Sean for the reply. &...
2014 Aug 07
4
[LLVMdev] Efficient Pattern matching in Instruction Combine
...ch' functions. There will be various permutations of it where one of the operand might be a constant (I guess this is handled already as constant are re-associated to RHS). I will try to dig more on this. Inputs/suggestions/comments on improving match functions are most awaited. :) Regards, Suyog -- With regards, Suyog Sarda -------------- next part -------------- An HTML attachment was scrubbed... URL: <http://lists.llvm.org/pipermail/llvm-dev/attachments/20140807/18c3e6ec/attachment.html>
2014 Aug 13
2
[LLVMdev] Efficient Pattern matching in Instruction Combine
...rs, and a growing file that makes any of the non-trivial transforms easy to miss in the noise. On Tue, Aug 12, 2014 at 2:00 PM, Sean Silva <chisophugis at gmail.com> wrote: > Re-adding the mailing list (remember to hit "reply all") > > > On Tue, Aug 12, 2014 at 9:36 AM, suyog sarda <sardask01 at gmail.com> wrote: >> >> Thanks Sean for the reply. >> >> >> On Mon, Aug 11, 2014 at 11:49 PM, Sean Silva <chisophugis at gmail.com> >> wrote: >>> >>> >>> >>> >>> On Fri, Aug 8, 2014 at 1...
2014 Dec 11
2
[LLVMdev] Phabricator update
Hi Manuel, Thanks for the help. Still persists for me too. Instead of waiting indefinitely, now I get this error: Unhandled Exception ("AphrontDeadlockQueryException") #1205: Lock wait timeout exceeded; try restarting transaction On Thu, Dec 11, 2014 at 11:26 AM, suyog sarda <sardask01 at gmail.com> wrote: > The problem still persist :( > > On 12/11/14, Manuel Klimek <klimek at google.com> wrote: >> Another php type problem; can you please try again. Thanks! >> >> On Thu Dec 11 2014 at 1:37:32 PM Bruno Cardoso Lopes < &gt...
2014 Dec 11
2
[LLVMdev] Phabricator update
Another php type problem; can you please try again. Thanks! On Thu Dec 11 2014 at 1:37:32 PM Bruno Cardoso Lopes < bruno.cardoso at gmail.com> wrote: > I'm facing the same problem. > > On Thu, Dec 11, 2014 at 10:16 AM, suyog sarda <sardask01 at gmail.com> wrote: > > Hi, > > I am facing problem while submitting patch on phab. All things go smooth > - > > create diff, create revision, specify title and comments. However, when > I > > try to submit the diff by clicking "save"...
2015 May 04
3
[LLVMdev] AVX2 Cost Table in X86TargetTransformInfo
...- shouldn't then the cost of integer ADD/SUB/MUL (which would be 1) be explicitly specified in AVX2 cost table? Because right now this entry is missing and cost of these operations are taken from BaseTTI (which is generic). IMO, it will make things more clear. Your thoughts on this?? Regards, Suyog Sarda On 4 May 2015 21:57, "Nadav Rotem" <nrotem at apple.com> wrote: > > > On May 4, 2015, at 2:36 AM, suyog sarda <sardask01 at gmail.com> wrote: > > > > Hi all, > > > > I have a query regarding Cost Table for AVX2 in TargetTransformInfo. &g...
2014 Dec 11
2
[LLVMdev] Phabricator update
...t;>> Jon >>> >>> On 12/10/14 1:59 PM, Manuel Klimek wrote: >>>> >>>> Phab is back up - it's still a little slow (the mysql database we use is >>>> doing some cleanups). >>>> >>>> On Wed Dec 10 2014 at 5:07:07 PM suyog sarda <sardask01 at gmail.com> wrote: >>>> >>>>> And i was thinking something wrong with my proxy configuration :P >>>>> >>>>> On Wed, Dec 10, 2014 at 6:47 PM, Manuel Klimek <klimek at google.com> wrote: >>>>> >&...
2014 Dec 11
3
[LLVMdev] [cfe-dev] Phabricator update
...ting it would be very helpful. > > > Cheers, > > Jon > > > On 12/10/14 1:59 PM, Manuel Klimek wrote: > >> Phab is back up - it's still a little slow (the mysql database we use is >> doing some cleanups). >> >> On Wed Dec 10 2014 at 5:07:07 PM suyog sarda <sardask01 at gmail.com> wrote: >> >> And i was thinking something wrong with my proxy configuration :P >>> >>> On Wed, Dec 10, 2014 at 6:47 PM, Manuel Klimek <klimek at google.com> >>> wrote: >>> >>> Heya, >>>&gt...
2014 Dec 10
2
[LLVMdev] Phabricator update
Phab is back up - it's still a little slow (the mysql database we use is doing some cleanups). On Wed Dec 10 2014 at 5:07:07 PM suyog sarda <sardask01 at gmail.com> wrote: > And i was thinking something wrong with my proxy configuration :P > > On Wed, Dec 10, 2014 at 6:47 PM, Manuel Klimek <klimek at google.com> wrote: > >> Heya, >> >> if you wonder why phabricator is down - it's an...
2015 May 04
2
[LLVMdev] AVX2 Cost Table in X86TargetTransformInfo
...rning cost 1. While for AVX, it finds the ADD in cost table and returns 4 as scalar cost. I am suspecting this is something specific to architecture difference between AVX and AVX2. I am naive to architecture specifics in this case. I would be glad if someone clarifies on this. Thanks. Regards, Suyog Sarda -------------- next part -------------- An HTML attachment was scrubbed... URL: <http://lists.llvm.org/pipermail/llvm-dev/attachments/20150504/6bef97b3/attachment.html>
2015 Apr 10
2
[LLVMdev] MMX/SSE subtarget feature in IR
...e it might work. I don't know whether work has been done to specifically do something special for this combination, since use of MMX overlaps with X87 floating point state. The processors that support mmx, but not SSE would be Pentium w MMX processor Pentium II family processors Kevin From: suyog sarda [mailto:sardask01 at gmail.com] Sent: Friday, April 10, 2015 2:51 AM To: Smith, Kevin B Cc: Sanjay Patel; David Majnemer; LLVM Developers Mailing List Subject: Re: [LLVMdev] MMX/SSE subtarget feature in IR Hi Kevin, I had another query for 32 bit x86. (Apology for being naive) I guess the...
2014 Dec 11
3
[LLVMdev] [cfe-dev] Phabricator update
...; Jon >>> >>> >>> On 12/10/14 1:59 PM, Manuel Klimek wrote: >>> >>>> Phab is back up - it's still a little slow (the mysql database we use is >>>> doing some cleanups). >>>> >>>> On Wed Dec 10 2014 at 5:07:07 PM suyog sarda <sardask01 at gmail.com> >>>> wrote: >>>> >>>> And i was thinking something wrong with my proxy configuration :P >>>>> >>>>> On Wed, Dec 10, 2014 at 6:47 PM, Manuel Klimek <klimek at google.com> >>>>&gt...
2015 Apr 09
2
[LLVMdev] MMX/SSE subtarget feature in IR
...ted to distinguish my code generation based on subtarget feature for MMX and SSE, which i am unable to do so currently because of above scenario. I am sure i am missing something fundamental, but unable to exactly find out what. Can someone please help me out on above question? Thanks. Regards, Suyog Sarda -------------- next part -------------- An HTML attachment was scrubbed... URL: <http://lists.llvm.org/pipermail/llvm-dev/attachments/20150409/99327ede/attachment.html>
2015 Apr 09
2
[LLVMdev] MMX/SSE subtarget feature in IR
...10 Apr 2015 00:18, "Smith, Kevin B" <kevin.b.smith at intel.com> wrote: > For x86_64 ABI, a minimum feature set of SSE2 is required. > > > > Kevin > > > > *From:* llvmdev-bounces at cs.uiuc.edu [mailto:llvmdev-bounces at cs.uiuc.edu] *On > Behalf Of *suyog sarda > *Sent:* Thursday, April 09, 2015 11:27 AM > *To:* LLVM Developers Mailing List; David Majnemer; Sanjay Patel > *Subject:* [LLVMdev] MMX/SSE subtarget feature in IR > > > > Hi all, > > > > I have a sample test case : > > > > $ cat 1.c > > &g...
2014 Nov 10
2
[LLVMdev] [Vectorization] Mis match in code generated
Hi Suyog, Thanks for looking at this. This has recently got itself onto my TODO list too. > I am not sure how much all this will improve the code quality for horizontal reduction > (donno how frequently such pattern of horizontal reduction from same array occurs in real world/SPECS). Actually the m...
2014 Dec 11
2
[LLVMdev] [cfe-dev] Phabricator update
...> > /Manuel > > > > > > > > Cheers, > > Jon > > > > On 12/10/14 1:59 PM, Manuel Klimek wrote: > > Phab is back up - it's still a little slow (the mysql database we use is > doing some cleanups). > > On Wed Dec 10 2014 at 5:07:07 PM suyog sarda <sardask01 at gmail.com> wrote: > > And i was thinking something wrong with my proxy configuration :P > > On Wed, Dec 10, 2014 at 6:47 PM, Manuel Klimek <klimek at google.com> wrote: > > Heya, > > if you wonder why phabricator is down - it's an upgrade...
2014 Dec 10
2
[LLVMdev] Phabricator update
Heya, if you wonder why phabricator is down - it's an upgrade that is running a database update that takes a while (probably 3-5 more hours). I'll update this thread once it's finished and phab is up again. Cheers, /Manuel -------------- next part -------------- An HTML attachment was scrubbed... URL:
2014 Sep 19
3
[LLVMdev] [Vectorization] Mis match in code generated
...> > > > *F(int *sum ...){*sum = > a[0]+a[1]+a[2]+a[3]+a[4]+a[5]+a[6]+a[7]+a[8]+a[9]+a[10]+a[11]+a[12]+a[13]+a[14]+a[15];}* > > If it works we would only need to look for horizontal reductions at > returns. > > Sent from my iPhone > > On Sep 18, 2014, at 12:24 PM, suyog sarda <sardask01 at gmail.com> wrote: > > Hi Nadav, > > Thanks for the quick reply !! > > Ok, so as of now we are lacking capability to handle flat large reductions. > > I did go through function vectorizeChainsInBlock() (line number 2862). In > this function, >...
2016 May 30
0
sum elements in the vector
Suyog, Thanks for the reply. Do you know if it is possible to add a new intrinsic without actually modifying core code (ISDOpcodes.h is an example of core code)? I'd like to add this intrinsic with as little code change as possible. On Fri, May 27, 2016 at 8:59 PM, suyog sarda <sardask01 at gma...