llvm dev - Mar 2015 - [LLVMdev] Mul & div support for wider-than-legal types

Hi LLVM,

   1. Can mul and/or div support be added for big integer types like i256?
   2. What are the limits?
   3. If yes, how should it be done?

I have experience only with X86 target and know that mul i128 works and div
i128 is lowered to function call from compile-rt like library (what works
only if you link with such library). Can that support be extended?

- Paweł
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On Fri, Mar 20, 2015 at 09:06:24AM +0000, Paweł Bylica
wrote:
> Hi LLVM,
> 
>    1. Can mul and/or div support be added for big integer types like i256?
>    2. What are the limits?
>    3. If yes, how should it be done?
> 
> I have experience only with X86 target and know that mul i128 works and div
> i128 is lowered to function call from compile-rt like library (what works
> only if you link with such library). Can that support be extended?
mul can be inlined easily if necessary for arbitrary sizes, but div is
very expensive. Note that div can be expanded to calls even for smaller
sizes, since many (older) architectures don't have hardware division.

What's your use case?

Joerg

> mul can be inlined easily if necessary for arbitrary sizes, but div is very
expensive.
Shall I file a bug for "implement FFT in LLVM"?

Tim.

On Sat, Mar 21, 2015 at 3:20 AM Joerg Sonnenberger <joerg at
britannica.bec.de>
wrote:
> On Fri, Mar 20, 2015 at 09:06:24AM +0000, Paweł Bylica wrote:
> > Hi LLVM,
> >
> >    1. Can mul and/or div support be added for big integer types like
> i256?
> >    2. What are the limits?
> >    3. If yes, how should it be done?
> >
> > I have experience only with X86 target and know that mul i128 works
and
> div
> > i128 is lowered to function call from compile-rt like library (what
works
> > only if you link with such library). Can that support be extended?
>
> mul can be inlined easily if necessary for arbitrary sizes, but div is
> very expensive. Note that div can be expanded to calls even for smaller
> sizes, since many (older) architectures don't have hardware division.
>
> What's your use case?
>
> Joerg
>
I would be happy to have mul and div up to i512 on x86_64 target. My
current solution is to replace that instructions with call to my helper
functions.

If I understand correctly one big mul can be composed of 4 half-precision
mul instructions? Would such solution be accepted by LLVM?

- Paweł
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