search for: wider

...some cycles to spare, can you please > consider compiling flac from git with the attached patch and see if > you have any files that fail with "flac -t" ? > > With the known problem file (snippet6.wav) encoded by 1.3.0 it prints > this: > > WARNING: residual -11025151 wider than bps 24 > WARNING: residual 41873263 wider than bps 24 > WARNING: residual -67175215 wider than bps 24 > WARNING: residual 69950995 wider than bps 24 > WARNING: residual -67108864 wider than bps 24 > ... > WARNING: residual 11227392 wider than bps 24 > WARNING: residual -87...

...more pessimistic than they would need to be if residuals were at most bps wide. With signed multiplication I think the correct check would actually be bps + subframe->qlp_coeff_precision + FLAC__bitmath_ilog2(order) - 1 <= 32 But, as we have seen with unusual data the residual signal can be wider than bps. The FLAC format specification doesn't seem to mention this. Should it be treated as a valid FLAC stream? Based on the analysis above, the currently used check allows residuals at most 1 bit wider than bps. Another problem could be that the local_lpc_restore_signal_16bit function may t...

On Thu, Jun 19, 2014 at 03:30:06PM +0200, Miroslav Lichvar wrote: > But, as we have seen with unusual data the residual signal can be > wider than bps. The FLAC format specification doesn't seem to mention > this. Should it be treated as a valid FLAC stream? I think it would be interesting to know how common are such streams. I patched flac to print a warning on decoding or testing when this is detected, but didn't find any f...

Package: xen-utils-common Version: 3.0.3-0-2 Severity: wishlist Tags: patch Currently when hostnames are wider than 10 chars, the xentop output is messed up. Please add the following patch to support up to 20 chars, or better yet, allow the columns to auto size :) #! /bin/sh /usr/share/dpatch/dpatch-run ## xentop-name-width.dpatch by <apeeters@lashout.net> ## ## All lines beginning with `## DP:'...

...width for the message text. Archives for this list: <https://lists.centos.org/pipermail/centos/> I looked up a useful reply in the archives for sharing elsewhere and found that they're nicely-formatted but the message display is a little narrow so the normal email wrapping column is wider than allowed by the archive page's CSS, resulting in text lines getting truncated unpleasantly. I'm guessing it's wrapping at 72 columns instead of 80 but I'm not enough of a CSS wizard to find how the element width is set but adding about 10% would probably fix it. Here's...

...in practise, at least on x86. Using larger than 128-bit integers we have hit assertion failures, crashes and miscompiles. Things are even worse for vectors of non-legal(?) types (say <2 x i2>). Some of the issue that we hit after giving up on vectorized code and relying directly on LLVM for wider-than-legal types: http://llvm.org/bugs/show_bug.cgi?id=20011 (crash with <2 x i2>) http://llvm.org/bugs/show_bug.cgi?id=20012 (error when storing <2 x i4>) http://llvm.org/bugs/show_bug.cgi?id=19797 (assert failure on multiplication of i192) http://llvm.org/bugs/show_bug.cgi?id=20921 (...

Hello all, I would like to propose adding the -mprefer-avx256 and -mprefer-avx128 command line flags supported by latest GCC to clang. These flags will be used to limit the vector register size presented by TTI to the vectorizers. The backend will still be able to use wider registers for code written using the instrinsics in x86intrin.h. And the backend will still be able to use AVX512VL instructions and the additional XMM16-31 and YMM16-31 registers. Motivation: -Using 512-bit operations on some Intel CPUs may cause a decrease in CPU frequency that may offset the...

Hi, I am currently working on an opencl project based on LLVM, the target device is 32bit. I met a problem that some llvm passes like GVN SROA will generate some IR operating on wide integer types like i128 or i512. But the device does not support such kind of data type. Is there any idea on how to lower this kind of IR to only operate on i32 or vector of i32? Or is there any existing code handle

On 11 January 2017 at 10:24, Jim Grosbach via llvm-dev <llvm-dev at lists.llvm.org> wrote: > ARM64 is like this. I suggest having a look at that backend (lib/Target/AArch64) and how it deals with implicit zeroing of the upper bits of the X registers. ARM64 has a separate name for the registers as 32-bit values though (W0-W30 rather than X0-X30). I could easily see DAG ISel throwing a fit

Hello, I am new to R and have a couple of questions. My data set contains the variables "Bwt" and "Hwt", which are bodyweight and heartweight, respectively, of a group of cats. With the following code, I am making two plots, both to be viewed in the same plot window in R: library(MASS) maleData <- subset(cats, Sex == "M") linreg0 <- lm(maleData$Hwt ~

> mul can be inlined easily if necessary for arbitrary sizes, but div is very expensive. Shall I file a bug for "implement FFT in LLVM"? Tim.

Hi, in my rhtml, I have two parts, the main part and a partial, the main part has a width almost the same, but the partial is much longer and width. when it happens. the vertical scroll appear correctly on the browser, but the horizontal scroll doesn''t appear on the browser, it appears instead on the partial render part, so I have to scoll down until the end of the partial, that use the

Could someone provide a description of the config setting KbdInteractiveDevices And how it would be used. There is no mention of this here: http://www.openbsd.org/cgi-bin/man.cgi?query=ssh_config&sektion=5&arch=&apropos=0&manpath=OpenBSD+Current And a quick glance of the source doesn't seem to reveal much. Thanks in advance, scott

...4-09-04 14:23 GMT+08:00 Chandler Carruth <chandlerc at google.com>: > Yes, the LLVM backend does type legalization on the SelectionDAG formed > from the LLVM IR. This eliminates too-wide integer types by decomposing the > operations. > > However, SROA never produces an integer wider than what was used in the > input IR that I know of... I would be surprised if GVN did this either. > > > On Wed, Sep 3, 2014 at 10:53 PM, Ruiling Song <ruiling.song83 at gmail.com> > wrote: > >> Hi, >> >> I am currently working on an opencl project based o...

On Sun, Mar 22, 2015 at 5:57 AM Joerg Sonnenberger <joerg at britannica.bec.de> wrote: > On Fri, Mar 20, 2015 at 08:06:11PM -0700, Tim Northover wrote: > > > mul can be inlined easily if necessary for arbitrary sizes, but div is > very expensive. > > > > Shall I file a bug for "implement FFT in LLVM"? > > I didn't say it is the most efficient

Hi LLVM, 1. Can mul and/or div support be added for big integer types like i256? 2. What are the limits? 3. If yes, how should it be done? I have experience only with X86 target and know that mul i128 works and div i128 is lowered to function call from compile-rt like library (what works only if you link with such library). Can that support be extended? - Paweł -------------- next part

Hi, I have noticed some loops that build a wider element by loading small elements, zero-extending them, shifting them (with different amounts) to then 'or' them all together. They are either equivalent of a wider load, or to that of a byte-swapped one. DAGCombiner::MatchLoadCombine() will combine this to a single wide load, but only...

I haven't looked into actually implementing revectorization, so we may just want to ignore that possibility for now. But I imagined that revectorization could hit the same problem that we're trying to avoid here: if the cost models say that wider vectors are legal and cheaper, but the reality is that perf will suffer when using those wider vectors, then we want to avoid using the wider ops. The user pref/override will be taken into account when deciding if we should go wider. In either scenario, we're not actually removing or limiting...

Hi: I love Locomotive and use it exclusively for my rails projects. I''d like to install GRUFF and give it a try (a graph image creation package). I know I can do sudo gem install gruff from the command line for normal ruby and rails. How do I make gems available to Locomotive? bruce

...;> >> I would like to propose adding the -mprefer-avx256 and -mprefer-avx128 >> command line flags supported by latest GCC to clang. These flags will be >> used to limit the vector register size presented by TTI to the vectorizers. >> The backend will still be able to use wider registers for code written >> using the instrinsics in x86intrin.h. And the backend will still be able to >> use AVX512VL instructions and the additional XMM16-31 and YMM16-31 >> registers. >> >> >> >> Motivation: >> >> -Using 512-bit operations...