llvm dev - Oct 2013 - [LLVMdev] [TableGen][AsmParser][MC] isAsmParserOnly flag in class Instruction

Hi all,
I'm working on llvm assembler support for Mips and for a while I'm
trying to solve a problem regarding complex macro instructions. As mips
assembler supports macro instructions that can develop to more then one real
instruction depending on the operand type(usually two or three) we can't use
InstAlias to exploit tableGen generated code. Currently we expand these in
MipsAsmParser in a post processing methods, but I would like to at least be able
to easily identify them, and if possible call some method that handles this to
avoid giant switch/case structure in method that processes them. I have seen
that in Target.td file in class instruction there is a flag isAsmParserOnly
which could be used to mark these macros:
  // Is this instruction a pseudo instruction for use by the assembler parser.
  bit isAsmParserOnly = 0;

but, as far as I can tell, this flag is not available to the AsmParser nor it
can be accessed via MCInstrDesc class that we import as externally defined. In
fact, the only thing it is used for is to avoid generating codeGen info for
these instructions in tableGen. So, I was wandering if there is a plan to use
this flag in asmMatcher or at least make it available in AsmParser?

Kind regards

Vladimir Medic
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Hi Vladimir,

ARM does similar things for complex assembly pseudos. Have a look at the
definition and use of AsmPseudoInst in the ARM backend. They’re not typically
expanding to multiple “real” instructions, but that’s an implementation detail,
not a constraint.

-Jim


On Oct 1, 2013, at 5:36 AM, Vladimir Medic <Vladimir.Medic at imgtec.com>
wrote:
> Hi all,
> I'm working on llvm assembler support for Mips and for a while I'm
trying to solve a problem regarding complex macro instructions. As mips
assembler supports macro instructions that can develop to more then one real
instruction depending on the operand type(usually two or three) we can't use
InstAlias to exploit tableGen generated code. Currently we expand these in
MipsAsmParser in a post processing methods, but I would like to at least be able
to easily identify them, and if possible call some method that handles this to
avoid giant switch/case structure in method that processes them. I have seen
that in Target.td file in class instruction there is a flag isAsmParserOnly
which could be used to mark these macros:
>   // Is this instruction a pseudo instruction for use by the assembler
parser.
>   bit isAsmParserOnly = 0;
> 
> but, as far as I can tell, this flag is not available to the AsmParser nor
it can be accessed via MCInstrDesc class that we import as externally defined.
In fact, the only thing it is used for is to avoid generating codeGen info for
these instructions in tableGen. So, I was wandering if there is a plan to use
this flag in asmMatcher or at least make it available in AsmParser?
> 
> Kind regards
> 
> Vladimir Medic
> _______________________________________________
> LLVM Developers mailing list
> LLVMdev at cs.uiuc.edu         http://llvm.cs.uiuc.edu
> http://lists.cs.uiuc.edu/mailman/listinfo/llvmdev
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Hi Jim,
I did look at the ARMAsmParser and it seems to me that it is using a switch/case
construct to change the opcode and the operands, but this construct may become
too large eventually. I was wondering if it is possible to use isAsmParser only
flag to call dedicated methods, like dedicated parsers for AsmOperands.

Regards

Vladimir
________________________________
From: Jim Grosbach [grosbach at apple.com]
Sent: Wednesday, October 02, 2013 4:46 AM
To: Vladimir Medic
Cc: llvmdev at cs.uiuc.edu
Subject: Re: [LLVMdev] [TableGen][AsmParser][MC] isAsmParserOnly flag in class
Instruction

Hi Vladimir,

ARM does similar things for complex assembly pseudos. Have a look at the
definition and use of AsmPseudoInst in the ARM backend. They’re not typically
expanding to multiple “real” instructions, but that’s an implementation detail,
not a constraint.

-Jim


On Oct 1, 2013, at 5:36 AM, Vladimir Medic <Vladimir.Medic at
imgtec.com<mailto:Vladimir.Medic at imgtec.com>> wrote:

Hi all,
I'm working on llvm assembler support for Mips and for a while I'm
trying to solve a problem regarding complex macro instructions. As mips
assembler supports macro instructions that can develop to more then one real
instruction depending on the operand type(usually two or three) we can't use
InstAlias to exploit tableGen generated code. Currently we expand these in
MipsAsmParser in a post processing methods, but I would like to at least be able
to easily identify them, and if possible call some method that handles this to
avoid giant switch/case structure in method that processes them. I have seen
that in Target.td file in class instruction there is a flag isAsmParserOnly
which could be used to mark these macros:
  // Is this instruction a pseudo instruction for use by the assembler parser.
  bit isAsmParserOnly = 0;

but, as far as I can tell, this flag is not available to the AsmParser nor it
can be accessed via MCInstrDesc class that we import as externally defined. In
fact, the only thing it is used for is to avoid generating codeGen info for
these instructions in tableGen. So, I was wandering if there is a plan to use
this flag in asmMatcher or at least make it available in AsmParser?

Kind regards

Vladimir Medic
_______________________________________________
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