On 18 July 2012 15:46, salvatore benedetto <salvatore.benedetto at gmail.com> wrote:> $ clang++ -ccc-host-triple thumbv7m-none-gnueabi noInclude.cpp -c > --sysroot=/home/emitrax/CodeSourcery/Sourcery_G++_Lite/arm-none-linux-gnueabi/libc/Try -ccc-gcc-name arm-none-linux-gnueabi-g++ -ccc-host-triple thumbv7m-none-linux-gnueabi Sometimes it's better than sysroot, as it finds it all by itself. -- cheers, --renato http://systemcall.org/
salvatore benedetto
2012-Jul-18 16:08 UTC
[LLVMdev] Setting up a cross-compiler for cortex-m3
On Wed, Jul 18, 2012 at 5:45 PM, Renato Golin <rengolin at systemcall.org> wrote:> On 18 July 2012 15:46, salvatore benedetto > <salvatore.benedetto at gmail.com> wrote: >> $ clang++ -ccc-host-triple thumbv7m-none-gnueabi noInclude.cpp -c >> --sysroot=/home/emitrax/CodeSourcery/Sourcery_G++_Lite/arm-none-linux-gnueabi/libc/ > > Try -ccc-gcc-name arm-none-linux-gnueabi-g++ -ccc-host-triple > thumbv7m-none-linux-gnueabi > > Sometimes it's better than sysroot, as it finds it all by itself.And the winner is.. clang++ -ccc-gcc-name arm-none-linux-gnueabi-g++ -ccc-host-triple thumbv7m-none-gnueabi testReference.cpp -c It seems like it worked. $ arm-none-linux-gnueabi-objdump -D --section=.text testReference.o testReference.o: file format elf32-littlearm Disassembly of section .text: 00000000 <main>: 0: e92d4800 push {fp, lr} 4: e1a0b00d mov fp, sp 8: e24dd030 sub sp, sp, #48 ; 0x30 ... I'm not 100% sure if that's the correct ISA, because I haven't run the code, but it seems ok. I of course own you a beer :-) Thank you very much. Now, a grep of clang++ --ccc-gcc-name didn't give any result so I'm still wondering what exactly I am doing here. Which part of gcc I'm using with that option? Just the libc, libgcc et all? Regards, S.
On 18 July 2012 17:08, salvatore benedetto <salvatore.benedetto at gmail.com> wrote:> I of course own you a beer :-) Thank you very much.I will remind you of that, next year, on EuroLLVM 2013. :D> Which part of gcc I'm using with that option? > Just the libc, libgcc et all?AFAIK, it uses the name to find the tool chain, and guess all other binaries from it. So it calls arm-linux-gnueabi-ld, arm-linux-gnueabi-as etc. instead of ld, as etc., which is what you were missing. -- cheers, --renato http://systemcall.org/
salvatore benedetto
2012-Jul-22 18:57 UTC
[LLVMdev] Setting up a cross-compiler for cortex-m3
On Wed, Jul 18, 2012 at 6:08 PM, salvatore benedetto <salvatore.benedetto at gmail.com> wrote:> On Wed, Jul 18, 2012 at 5:45 PM, Renato Golin <rengolin at systemcall.org> wrote: >> On 18 July 2012 15:46, salvatore benedetto >> <salvatore.benedetto at gmail.com> wrote: >>> $ clang++ -ccc-host-triple thumbv7m-none-gnueabi noInclude.cpp -c >>> --sysroot=/home/emitrax/CodeSourcery/Sourcery_G++_Lite/arm-none-linux-gnueabi/libc/ >> >> Try -ccc-gcc-name arm-none-linux-gnueabi-g++ -ccc-host-triple >> thumbv7m-none-linux-gnueabi >> >> Sometimes it's better than sysroot, as it finds it all by itself. > > And the winner is.. > > clang++ -ccc-gcc-name arm-none-linux-gnueabi-g++ -ccc-host-triple > thumbv7m-none-gnueabi testReference.cpp -c > > It seems like it worked. > > $ arm-none-linux-gnueabi-objdump -D --section=.text testReference.o > > testReference.o: file format elf32-littlearm > > > Disassembly of section .text: > > 00000000 <main>: > 0: e92d4800 push {fp, lr} > 4: e1a0b00d mov fp, sp > 8: e24dd030 sub sp, sp, #48 ; 0x30 > ... > > I'm not 100% sure if that's the correct ISA, because I haven't run the > code, but it seems ok. >Unfortunately, I have to resurrect this thread. I had the time to test the code, and it is using the wrong ISA. I can't understand why, but it uses armv5te instead of thumb2. $ clang++ -ccc-gcc-name arm-none-linux-gnueabi-g++ -ccc-host-triple thumbv7m-none-gnueabi testReference.cpp -c $ arm-none-linux-gnueabi-readelf -A testReference.o Attribute Section: aeabi File Attributes Tag_CPU_name: "5TE" Tag_CPU_arch: v5TE Tag_ARM_ISA_use: Yes Tag_THUMB_ISA_use: Thumb-1 Tag_ABI_FP_denormal: Needed Tag_ABI_FP_exceptions: Needed Tag_ABI_FP_number_model: IEEE 754 Tag_ABI_align_needed: 8-byte Tag_ABI_align_preserved: 8-byte, except leaf SP Tag_DIV_use: Not allowed I realized this only when I moved to compile my firmware and got the following /tmp/startup-EFUAJp.s: Assembler messages: /tmp/startup-EFUAJp.s:84: Error: width suffixes are invalid in ARM mode -- `ldr.w sp,[r0]' Using the -v options produce the following gcc version 4.6.3 (Sourcery CodeBench Lite 2012.03-57) COLLECT_GCC_OPTIONS='-ffunction-sections' '-fno-common' '-fno-exceptions' '-fno-rtti' '-v' '-nostdlib' '-nodefaultlibs' '-Wall' '-stdlib=libc++' '-I' '/home/emitrax/bin/llvm/lib/c++/v1' '-std=c++11' '-I' '/home/emitrax/programming/adok/build/include/private' '-I' '/home/emitrax/programming/adok/include/private' '-c' '-o' 'source/porting/arch/arm/cortex-m3/stack.cpp.o' '-shared-libgcc' '-march=armv5te' '-mtls-dialect=gnu' '-D' '__CS_SOURCERYGXX_MAJ__=2012' '-D' '__CS_SOURCERYGXX_MIN__=3' '-D' '__CS_SOURCERYGXX_REV__=57' Any suggestions? Regards, S.
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- [LLVMdev] Setting up a cross-compiler for cortex-m3