search for: cortex

Motivation At the moment, when targeting armv7a, clang defaults to generate code as if -mcpu=cortex-a8 was specified. When targeting armv8a, it defaults to generate code as if -mcpu=cortex-a53 was specified. This leads to surprising code generation, by the compiler optimizing for a specific micro-architecture, whereas the intent from the user was probably to generate code that is "blended&q...

Thanks for everyone giving their feedback! I saw pretty unanimous support for making -mcpu=generic the default and making -mcpu=generic schedule for an in-order CPU (Cortex-A8 in this case). I'll be making those changes shortly. I think the comments also make clear that it's less obvious whether we'd want -mcpu=native to become a default. It's probably good for some use cases, but really not good for other use cases. I won't be making that change,...

In ARM.td, I see that the ProcessorModel for cortex-r4, cortex-r4f, and cortex-r5 (as well as r7 and r8) is based on "CortexA8Model", which seems incorrect. When this was added in 2015, there were also comments associated with this configuration, such as "// FIXME: R5 has currently the same ProcessorModel as A8" (later removed)....

Dear all, I'm attempting to plot a cubic relationship between two variables controlling for the effects of a third variable. In this short example, I'm trying to use AGE to predict CORTEX while controlling for the effects of TIV (total intracranial volume): ######################## cortex = rnorm(100, mean=0.5, sd=0.5) age = rnorm(100, mean=10, sd=2) tiv = rnorm(100, mean=1000, sd=100) ## ## simple regression (ignoring TIV) works ## cortex.lm = lm(cortex ~ poly(age, degree=3)) p...

...Sep 20, 2011, at 11:22 AM, Galina Kistanova wrote: > Please use the correct link : > http://63.145.236.72:8011 > and ignore the previous. > > Also log for broken build is here: > > make[1]: Entering directory > `/home/buildslave/zorg/buildbot/osuosl/slave/clang-native-arm-cortex-a9/llvm/lib/Support' > llvm[1]: Compiling APFloat.cpp for Release+Asserts build > llvm[1]: Compiling APInt.cpp for Release+Asserts build > In file included from APFloat.cpp:15: > In file included from > /home/buildslave/zorg/buildbot/osuosl/slave/clang-native-arm-cortex-a9/llvm/i...

Hello everybody, Just a short note that clang build "clang-native-arm-cortex-a9" is broken and the very last successful build was for revision 139932. All newer revisions fail. The builder is available here: http://172.16.0.135:8011/waterfall Thanks Galina

Please use the correct link : http://63.145.236.72:8011 and ignore the previous. Also log for broken build is here: make[1]: Entering directory `/home/buildslave/zorg/buildbot/osuosl/slave/clang-native-arm-cortex-a9/llvm/lib/Support' llvm[1]: Compiling APFloat.cpp for Release+Asserts build llvm[1]: Compiling APInt.cpp for Release+Asserts build In file included from APFloat.cpp:15: In file included from /home/buildslave/zorg/buildbot/osuosl/slave/clang-native-arm-cortex-a9/llvm/include/llvm/ADT/APFloat.h...

Hi, I am trying to cross compile code for ARM Cortex m0, m3, and m4. For m0, I use: -target armv6--eabi -mcpu=cortex-m0 That seems to work. For m3 and m4, I use the following which does not work (fatal error: error in backend: CPU: 'cortex-m3' does not support ARM mode): -target armv7m--eabi -mcpu=cortex-m3 and -target armv7em--e...

...tanova wrote: > >> Please use the correct link : >> http://63.145.236.72:8011 >> and ignore the previous. >> >> Also log for broken build is here: >> >> make[1]: Entering directory >> `/home/buildslave/zorg/buildbot/osuosl/slave/clang-native-arm-cortex-a9/llvm/lib/Support' >> llvm[1]: Compiling APFloat.cpp for Release+Asserts build >> llvm[1]: Compiling APInt.cpp for Release+Asserts build >> In file included from APFloat.cpp:15: >> In file included from >> /home/buildslave/zorg/buildbot/osuosl/slave/clang-native-...

Hi all, Thanks for the info. Few observations from my side : LLVM : cortex-a8 vfpv3 : no vmla or vfma instruction emitted cortex-a8 vfpv4 : no vmla or vfma instruction emitted (This is invalid though as cortex-a8 does not have vfpv4) cortex-a8 vfpv4 with ffp-contract=fast : vfma instruction emitted ( this seems a bug to me!! If cortex-a8 doesn't come with vfpv4 then...

...the processor has division instruction, if it does, it uses it, otherwise it uses slower library call. The program works with gcc, but it doesn't work with clang. clang reports error on the sdiv instruction in the assembler. The problem is this - you either compile this program with -mcpu=cortex-a9, then clang reports error on the sdiv instruction because cortex a9 doesn't have sdiv. Or - you compile the program with -mcpu=cortex-a15, then clang compiles it, but it uses full cortex-a15 instruction set and the program crashes on cortex a9 and earlier cores. Even if I use -no-integra...

Hi all, On following code when I use llc targeting ARM Cortex-A9 as follows, if vmlx-forwarding is turned off then 'vmla' instructions are generated. It seems that -mcpu=cortex-a9 enables it by default and thus less 'vmla' instructions are generated. On this specific example it doesn't make any difference in term of performance, but on a m...

Hi Anitha, Thanks for your answer but -mcpu=cortex-a9 -mattr=+vfp4 doesn' t enable fused mac generation for me. I would like just to understand why -mtriple=armv7-eabi enables it while -mcpu=cortex-a9 seems to disable it ? Seb > -----Original Message----- > From: Anitha Boyapati [mailto:anitha.boyapati at gmail.com] > Sent: Thursday,...

Hi Renato, It's definitively not A15. Can this be the case that NEON units for cortex-A9 support it but isn't documented/recommended ? And as mentioned before code is working ! Seb > -----Original Message----- > From: rengolin at gmail.com [mailto:rengolin at gmail.com] On Behalf Of > Renato Golin > Sent: Friday, November 09, 2012 6:27 PM > To: Sebastien DELDON...

On 18 July 2012 14:33, salvatore benedetto <salvatore.benedetto at gmail.com> wrote: > but I still haven't figure out how to build for cortex-m3 > > clang -march=armv7-m -mfloat-abi=soft <something missing?> testReference.cpp -c -march should have done the trick. You can also try -mcpu=cortex-m3, or try -ccc-host-triple armv7m-none-gnueabi (or -eabi), and possibly -ccc-gcc-name code sourcery's gcc, or possibly --sysr...

...to generate fma (using llc -mtriple=armv7-eabi). Maybe someone from ARM can answer the question ? Seb From: JF Bastien [mailto:jfb at google.com] Sent: Friday, November 09, 2012 5:36 PM To: Sebastien DELDON-GNB Cc: Anitha Boyapati; llvmdev at cs.uiuc.edu Subject: Re: [LLVMdev] fmac generation for cortex-a9 AFAIK A9 doesn't have VFPv4 or AdvSIMDv2, so it doesn't have VFMA. I don't know what LLVM does, but it shouldn't emit VFMA when you target A9. VMLA isn't a fused multiply-add, it's a multiply followed by an add and has different latency as well as precision. On Thu, Nov...

...rt of Xen to ARM with virt extensions are best posted to xen-devel, the xen-arm list focuses on the PV port. Adding xen-devel since it seems you are mainly asking about the w/-virt-extensions port. On Fri, 2012-05-18 at 12:38 +0100, Krishna Pavan wrote: > Please inform the status of Xen-ARM for Cortex-A8 CPU''s on FME from > ARM. AFAIK no one has tried the w/-virt-extensions port on this model. The only ones which I know have been tried are Cortex-A15 model and AEM. Cortex-A8 already exists so I would be surprised if it were to be updated with virt extensions, do you have some reaso...

...t; Please use the correct link : >>> http://63.145.236.72:8011 >>> and ignore the previous. >>> >>> Also log for broken build is here: >>> >>> make[1]: Entering directory >>> `/home/buildslave/zorg/buildbot/osuosl/slave/clang-native-arm-cortex-a9/llvm/lib/Support' >>> llvm[1]: Compiling APFloat.cpp for Release+Asserts build >>> llvm[1]: Compiling APInt.cpp for Release+Asserts build >>> In file included from APFloat.cpp:15: >>> In file included from >>> /home/buildslave/zorg/buildbot/osuosl...

cat /proc/cpuinfo ? Are you sure it's generating VFMA and not VMLA? On Fri, Nov 9, 2012 at 9:35 AM, Sebastien DELDON-GNB < sebastien.deldon at st.com> wrote: > Hi Renato, > > It's definitively not A15. Can this be the case that NEON units for > cortex-A9 support it but isn't documented/recommended ? > And as mentioned before code is working ! > > Seb > > > > -----Original Message----- > > From: rengolin at gmail.com [mailto:rengolin at gmail.com] On Behalf Of > > Renato Golin > > Sent: Friday, November...

Here is a one-line patch to support the cortex-m3. For those who plan the features for ARM, the new cortex-m0 implements only a subset of the Thumb2 instructions. I still have yet to see a document that details what's in the subset. -------------- next part -------------- An embedded and charset-unspecified text was scrubbed... Name: ar...