Ilia Mirkin
2014-May-10 19:06 UTC
[Nouveau] [PATCH] nv50/ir: make sure to reverse cond codes on all the OP_SET variants
Signed-off-by: Ilia Mirkin <imirkin at alum.mit.edu> Cc: "10.2 10.1" <mesa-stable at lists.freedesktop.org> --- Found this while tracking a regression on nvc0 for my patch which fixes ir_unop_any to emit or's instead of dp3's. (That patch is fine, this code was always broken.) src/gallium/drivers/nouveau/codegen/nv50_ir_peephole.cpp | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/src/gallium/drivers/nouveau/codegen/nv50_ir_peephole.cpp b/src/gallium/drivers/nouveau/codegen/nv50_ir_peephole.cpp index c89e1c3..cdae3c8 100644 --- a/src/gallium/drivers/nouveau/codegen/nv50_ir_peephole.cpp +++ b/src/gallium/drivers/nouveau/codegen/nv50_ir_peephole.cpp @@ -187,7 +187,8 @@ LoadPropagation::checkSwapSrc01(Instruction *insn) return; } - if (insn->op == OP_SET) + if (insn->op == OP_SET || insn->op == OP_SET_AND || + insn->op == OP_SET_OR || insn->op == OP_SET_XOR) insn->asCmp()->setCond = reverseCondCode(insn->asCmp()->setCond); else if (insn->op == OP_SLCT) -- 1.8.5.5
Ben Skeggs
2014-May-11 23:21 UTC
[Nouveau] [PATCH] nv50/ir: make sure to reverse cond codes on all the OP_SET variants
On Sun, May 11, 2014 at 5:06 AM, Ilia Mirkin <imirkin at alum.mit.edu> wrote:> Signed-off-by: Ilia Mirkin <imirkin at alum.mit.edu> > Cc: "10.2 10.1" <mesa-stable at lists.freedesktop.org>Reviewed-by: Ben Skeggs <bskeggs at redhat.com>> --- > > Found this while tracking a regression on nvc0 for my patch which fixes > ir_unop_any to emit or's instead of dp3's. (That patch is fine, this code was > always broken.) > > src/gallium/drivers/nouveau/codegen/nv50_ir_peephole.cpp | 3 ++- > 1 file changed, 2 insertions(+), 1 deletion(-) > > diff --git a/src/gallium/drivers/nouveau/codegen/nv50_ir_peephole.cpp b/src/gallium/drivers/nouveau/codegen/nv50_ir_peephole.cpp > index c89e1c3..cdae3c8 100644 > --- a/src/gallium/drivers/nouveau/codegen/nv50_ir_peephole.cpp > +++ b/src/gallium/drivers/nouveau/codegen/nv50_ir_peephole.cpp > @@ -187,7 +187,8 @@ LoadPropagation::checkSwapSrc01(Instruction *insn) > return; > } > > - if (insn->op == OP_SET) > + if (insn->op == OP_SET || insn->op == OP_SET_AND || > + insn->op == OP_SET_OR || insn->op == OP_SET_XOR) > insn->asCmp()->setCond = reverseCondCode(insn->asCmp()->setCond); > else > if (insn->op == OP_SLCT) > -- > 1.8.5.5 > > _______________________________________________ > Nouveau mailing list > Nouveau at lists.freedesktop.org > http://lists.freedesktop.org/mailman/listinfo/nouveau
Possibly Parallel Threads
- [PATCH 1/4] nvc0/ir: avoid jumping to a sched instruction
- [PATCH 3/4] nvc0/ir: optimize set & 1.0 to produce boolean-float sets
- [PATCH 1/2] nvc0/ir: detect AND/SHR pairs and convert into EXTBF
- [PATCH v2 0/3] nv50/ir: Preapre for running Opts inside a loop
- [PATCH 0/3] nv50/ir: Preapre for running Opts inside a loop