llvm dev - Jun 2017 - LLVM Assembly Instructions Generation Syntax

Hello,
I am generating some assembly code via llvm and using x86.
in all the instructions source appears before destination like;

subl $8, %esp
movl 16(%esp), %eax

vmovdqu32 c(%rip), %zmm0
addl b+132(%rip), %eax
movl %eax, a+132(%rip)


but when i refered the intel x86 manual, it says instruction has 1st
destination and then source;

is it due to llvm follows gas syntax instead of intel? but my machine and
normally machines are intel based then how does this gas syntax assembly of
llvm execute on our machines?

please correct me if i am wrong.


Thank You
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There are (at least) two styles of x86 assembly: "Intel" and
"AT&T" (aka
"att"). You can tell clang/llvm which you want to use - e.g in llc you
can
use -x86-asm-syntax=intel to get intel syntax. When using clang, you can
use -mllvm -x86-asm-syntax=intel to achieve the same thing.

The gnu assembler (by default at least) does indeed use the AT&T syntax,
but it's the way most assemblers on any Unix-related toolchains work. I
think the reason behind this is to have the same syntax, whether you are
using a motorola 68k, a digital pdp-11 or an x86 processor, although I
wasn't there when this was decided some 40-50 years back when Unix was
first invented at AT&T (hence the name of the syntax).

--
Mats



On 22 June 2017 at 08:32, hameeza ahmed via llvm-dev <
llvm-dev at lists.llvm.org> wrote:
> Hello,
> I am generating some assembly code via llvm and using x86.
> in all the instructions source appears before destination like;
>
> subl $8, %esp
> movl 16(%esp), %eax
>
> vmovdqu32 c(%rip), %zmm0
> addl b+132(%rip), %eax
> movl %eax, a+132(%rip)
>
>
> but when i refered the intel x86 manual, it says instruction has 1st
> destination and then source;
>
> is it due to llvm follows gas syntax instead of intel? but my machine and
> normally machines are intel based then how does this gas syntax assembly of
> llvm execute on our machines?
>
> please correct me if i am wrong.
>
>
> Thank You
>
>
>
>
> _______________________________________________
> LLVM Developers mailing list
> llvm-dev at lists.llvm.org
> http://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-dev
>
>
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On 22 June 2017 at 00:32, hameeza ahmed via llvm-dev
<llvm-dev at lists.llvm.org> wrote:
> is it due to llvm follows gas syntax instead of intel? but my machine and
> normally machines are intel based then how does this gas syntax assembly of
> llvm execute on our machines?
The syntax only affects the textual representation of the
instructions. The assemblers know which style they're looking at and
produce the same sequence of bytes in each case, which the CPU
obviously executes the same.

Cheers.

Tim.