llvm dev - Aug 2017 - Re-computing Live-in/Live-out Physical Registers for Basic Blocks Using LivePhysRegs

Hi, LLVM developers!




I am working on software control flow checking. I have to work at the native
assembly level, and rely on the code generator to provide various information.
I'm considering ARM Cortex-M3 as my target CPU.




I would like to determine live-in and live-out PHYSICAL registers for every
machine basic block after all code generation passes, such as the ARM Constant
Island pass, and before code emission. Unfortunately, at this point, information
about live-in/live-out registers has been invalidated by the ARM Constant Island
pass. So I am considering re-computing it.




Class LivePhysRegs seems to be able to compute live-in/live-out registers for a
given machine basic block based on live-in registers of its successors. It
appears to me that, if I perform a depth-first traversal through the control
flow graph of a function, calling LivePhysRegs::computeLiveIns on every machine
basic block, live-in/live-out physical registers are computed for every basic
block. Is this true?




Also, I would like to know whether APSR is dead or not on entry and exit of
every basic block. Is the register treated by LLVM specially or in the same way
as other general-purpose registers?




Thank you!







Ming Zhang
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Yes LivePhysRegs can do that for you. It has addLiveIns() and addLiveOuts()
functions to get the live-in or live-out set for a basic block (make the set is
empty when you call these functions).

Yes APSR is marked as a reserved register by the ARM target, this means we do
not track liveness for it.

- Matthias
> On Aug 2, 2017, at 2:45 AM, 章明 via llvm-dev <llvm-dev at lists.llvm.org
<mailto:llvm-dev at lists.llvm.org>> wrote:
> 
> Hi, LLVM developers!
> 
> 
> I am working on software control flow checking. I have to work at the
native assembly level, and rely on the code generator to provide various
information. I'm considering ARM Cortex-M3 as my target CPU.
> 
> 
> I would like to determine live-in and live-out PHYSICAL registers for every
machine basic block after all code generation passes, such as the ARM Constant
Island pass, and before code emission. Unfortunately, at this point, information
about live-in/live-out registers has been invalidated by the ARM Constant Island
pass. So I am considering re-computing it.
> 
> 
> Class LivePhysRegs seems to be able to compute live-in/live-out registers
for a given machine basic block based on live-in registers of its successors. It
appears to me that, if I perform a depth-first traversal through the control
flow graph of a function, calling LivePhysRegs::computeLiveIns on every machine
basic block, live-in/live-out physical registers are computed for every basic
block. Is this true?
> 
> 
> Also, I would like to know whether APSR is dead or not on entry and exit of
every basic block. Is the register treated by LLVM specially or in the same way
as other general-purpose registers?
> 
> 
> Thank you!
> 
> 
> 
> Ming Zhang
> 
> _______________________________________________
> LLVM Developers mailing list
> llvm-dev at lists.llvm.org <mailto:llvm-dev at lists.llvm.org>
> http://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-dev
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