Xen devel - Feb 2009 - [PATCH 4/4] ACPI: Enable THERM_CONTROL MSR write for dom0 even cpufreq=xen

Enable THERM_CONTROL MSR write for dom0 even cpufreq=xen

Signed-off-by: Wei Gang <gang.wei@intel.com>

diff -r bd683e0397b4 xen/arch/x86/traps.c
--- a/xen/arch/x86/traps.c	Tue Feb 17 22:29:38 2009 +0800
+++ b/xen/arch/x86/traps.c	Wed Feb 25 11:23:01 2009 +0800
@@ -2187,10 +2187,17 @@ static int emulate_privileged_op(struct 
         case MSR_IA32_MPERF:
         case MSR_IA32_APERF:
         case MSR_IA32_PERF_CTL:
+            if ( boot_cpu_data.x86_vendor != X86_VENDOR_INTEL )
+                goto fail;
+            if ( !is_cpufreq_controller(v->domain) )
+                break;
+            if ( wrmsr_safe(regs->ecx, eax, edx) != 0 )
+                goto fail;
+            break;
         case MSR_IA32_THERM_CONTROL:
             if ( boot_cpu_data.x86_vendor != X86_VENDOR_INTEL )
                 goto fail;
-            if ( !is_cpufreq_controller(v->domain) )
+            if ( d->domain_id != 0 )
                 break;
             if ( wrmsr_safe(regs->ecx, eax, edx) != 0 )
                 goto fail;

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On 26/02/2009 13:04, "Wei, Gang" <gang.wei@intel.com> wrote:
> Enable THERM_CONTROL MSR write for dom0 even cpufreq=xen
> 
> Signed-off-by: Wei Gang <gang.wei@intel.com>
If dom0 is not the cpufreq controller then it is not pinned onto particular
physical CPUs and fiddling with MSRs is rather suspect.

 -- Keir



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>> Enable THERM_CONTROL MSR write for dom0 even cpufreq=xen
>> 
>> Signed-off-by: Wei Gang <gang.wei@intel.com>
> 
> If dom0 is not the cpufreq controller then it is not pinned onto particular
> physical CPUs and fiddling with MSRs is rather suspect.
Yes, you are right. But what we really need is simply pinning dom0 vcpus, not
dom0 acting as cpufreq controller, am I right?
We do expect the MSR throttling still work while xen behaves  as the cpufreq
controller.

Jimmy
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On 03/03/2009 01:23, "Wei, Gang" <gang.wei@intel.com> wrote:
>>> Enable THERM_CONTROL MSR write for dom0 even cpufreq=xen
>>> 
>>> Signed-off-by: Wei Gang <gang.wei@intel.com>
>> 
>> If dom0 is not the cpufreq controller then it is not pinned onto
particular
>> physical CPUs and fiddling with MSRs is rather suspect.
> 
> Yes, you are right. But what we really need is simply pinning dom0 vcpus,
not
> dom0 acting as cpufreq controller, am I right?
> We do expect the MSR throttling still work while xen behaves  as the
cpufreq
> controller.
Then should the patch be dependent on opt_dom0_vcpus_pin?

 -- Keir



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On Tuesday, March 03, 2009 4:52 PM, Keir Fraser wrote:
> On 03/03/2009 01:23, "Wei, Gang" <gang.wei@intel.com>
wrote:
> 
>>>> Enable THERM_CONTROL MSR write for dom0 even cpufreq=xen
>>>> 
>>>> Signed-off-by: Wei Gang <gang.wei@intel.com>
>>> 
>>> If dom0 is not the cpufreq controller then it is not pinned onto
particular
>>> physical CPUs and fiddling with MSRs is rather suspect.
>> 
>> Yes, you are right. But what we really need is simply pinning dom0
vcpus, not
>> dom0 acting as cpufreq controller, am I right?
>> We do expect the MSR throttling still work while xen behaves  as the
cpufreq
>> controller.
> 
> Then should the patch be dependent on opt_dom0_vcpus_pin?
Oh, yes. We should add a check for opt_dom0_vcpus_pin.

Jimmy
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Here is the updated patch. Added check for opt_dom0_vcpus_pin.

Jimmy

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