search for: x86_vendor_intel

https://access.redhat.com/support/policy/intel shows mainly Xeon CPUs. What about Intel Core i7-6700 Quad-Core Skylake has the current EL6 variant support for it? Any experience? Feedback would be greatly appreciated. Thanks, LF

...raps.c Tue Feb 17 22:29:38 2009 +0800 +++ b/xen/arch/x86/traps.c Wed Feb 25 11:23:01 2009 +0800 @@ -2187,10 +2187,17 @@ static int emulate_privileged_op(struct case MSR_IA32_MPERF: case MSR_IA32_APERF: case MSR_IA32_PERF_CTL: + if ( boot_cpu_data.x86_vendor != X86_VENDOR_INTEL ) + goto fail; + if ( !is_cpufreq_controller(v->domain) ) + break; + if ( wrmsr_safe(regs->ecx, eax, edx) != 0 ) + goto fail; + break; case MSR_IA32_THERM_CONTROL: if ( boot_cpu_data.x86_vendor...

There has been some progress, but still no joy. Definitely not intended for inclusion at this point. Tim, Wei, I added a Xen command line toggle to disable IOMMU and P2M table sharing. Tim, I verified that changes to p2m-pt.c don''t break shadow mode (64bit hypervisor and Win 7 guest). Hongkaixing, I incorporated your suggestion in patch 2, so I should add your Signed-off-by eventually.

...00 Quad-Core Skylake >> >> has the current EL6 variant support for it? >> >> Any experience? Feedback would be greatly appreciated. > > > I found this > > linux-2.6.32-696.1.1.el6/arch/x86/kernel/setup.c > > 796 if ((boot_cpu_data.x86_vendor == X86_VENDOR_INTEL) && > 797 ((boot_cpu_data.x86 == 6))) { > 798 switch (boot_cpu_data.x86_model) { > 799 case 94: /* Skylake-S */ > 800 case 86: /* Broadwell-DE SoC */ > 801 case 85: /* Purley */ > 802 case 79: /* Broadwell-EP and EX */ > 8...

...te_init(); diff --git a/arch/x86/events/intel/uncore.c b/arch/x86/events/intel/uncore.c index 7012d18bb293..3f6d8b5672d5 100644 --- a/arch/x86/events/intel/uncore.c +++ b/arch/x86/events/intel/uncore.c @@ -1383,7 +1383,7 @@ static int __init intel_uncore_init(void) if (boot_cpu_data.x86_vendor != X86_VENDOR_INTEL) return -ENODEV; - if (cpu_has_hypervisor) + if (boot_cpu_has(X86_FEATURE_HYPERVISOR)) return -ENODEV; max_packages = topology_max_packages(); diff --git a/arch/x86/include/asm/cpufeature.h b/arch/x86/include/asm/cpufeature.h index fee7a6efcd2d..3aea54ecabfd 100644 --- a/arch/x86/includ...

...te_init(); diff --git a/arch/x86/events/intel/uncore.c b/arch/x86/events/intel/uncore.c index 7012d18bb293..3f6d8b5672d5 100644 --- a/arch/x86/events/intel/uncore.c +++ b/arch/x86/events/intel/uncore.c @@ -1383,7 +1383,7 @@ static int __init intel_uncore_init(void) if (boot_cpu_data.x86_vendor != X86_VENDOR_INTEL) return -ENODEV; - if (cpu_has_hypervisor) + if (boot_cpu_has(X86_FEATURE_HYPERVISOR)) return -ENODEV; max_packages = topology_max_packages(); diff --git a/arch/x86/include/asm/cpufeature.h b/arch/x86/include/asm/cpufeature.h index fee7a6efcd2d..3aea54ecabfd 100644 --- a/arch/x86/includ...

...r IT department to remove that stupidity. If you can't, please send email from a non-Red Hat email address. I don't understand why this is a useful warning to fix. What actual problem is caused by the code below? > return and break > > switch (c->x86_vendor) { > case X86_VENDOR_INTEL: > intel_p5_mcheck_init(c); > return 1; > - break; Sure, it's unnecessary, but it's not masking a bug. It's not unclear. Why do we want to enable this warning?

...Xeon CPUs. What about > > Intel Core i7-6700 Quad-Core Skylake > > has the current EL6 variant support for it? > > Any experience? Feedback would be greatly appreciated. I found this linux-2.6.32-696.1.1.el6/arch/x86/kernel/setup.c 796 if ((boot_cpu_data.x86_vendor == X86_VENDOR_INTEL) && 797 ((boot_cpu_data.x86 == 6))) { 798 switch (boot_cpu_data.x86_model) { 799 case 94: /* Skylake-S */ 800 case 86: /* Broadwell-DE SoC */ 801 case 85: /* Purley */ 802 case 79: /* Broadwell-EP and EX */ 803 case 78: /* Skyla...

...ability. Signed-off-by: Sebastian Herbszt <herbszt at gmx.de> diff --git a/com32/gpllib/cpuid.c b/com32/gpllib/cpuid.c index fa21204..f33e895 100644 --- a/com32/gpllib/cpuid.c +++ b/com32/gpllib/cpuid.c @@ -232,8 +232,10 @@ void generic_identify(struct cpuinfo_x86 *c) } break; case X86_VENDOR_INTEL: - cpuid(0x4, &eax, &ebx, &ecx, &edx); - c->x86_num_cores = ((eax & 0xfc000000) >> 26) + 1; + if (c->cpuid_level >= 0x00000004) { + cpuid(0x4, &eax, &ebx, &ecx, &edx); + c->x86_num_cores = ((eax & 0xfc000000) >> 26) + 1; + }...

From: Jeremy Fitzhardinge <jeremy.fitzhardinge@citrix.com> Hi all, This series adds a new microcode driver for Xen. The Xen hypervisor can deal with all the low-level details of doing a microcode update (Intel vs AMD, doing all the physical CPUs present on the system, current and future, etc), so all the driver has to do is make a hypercall to upload the microcode into Xen. This only

...> >>> has the current EL6 variant support for it? >>> >>> Any experience? Feedback would be greatly appreciated. >> >> I found this >> >> linux-2.6.32-696.1.1.el6/arch/x86/kernel/setup.c >> >> 796 if ((boot_cpu_data.x86_vendor == X86_VENDOR_INTEL) && >> 797 ((boot_cpu_data.x86 == 6))) { >> 798 switch (boot_cpu_data.x86_model) { >> 799 case 94: /* Skylake-S */ >> 800 case 86: /* Broadwell-DE SoC */ >> 801 case 85: /* Purley */ >> 802 case 79: /* Broad...

...port for it? >>>> >>>> Any experience? Feedback would be greatly appreciated. >>>> >>> >>> I found this >>> >>> linux-2.6.32-696.1.1.el6/arch/x86/kernel/setup.c >>> >>> 796 if ((boot_cpu_data.x86_vendor == X86_VENDOR_INTEL) && >>> 797 ((boot_cpu_data.x86 == 6))) { >>> 798 switch (boot_cpu_data.x86_model) { >>> 799 case 94: /* Skylake-S */ >>> 800 case 86: /* Broadwell-DE SoC */ >>> 801 case 85: /* Purley */ >>> 802...

The following two patches allow the parallel use of memsharing, xenpaging and xen-access by using an independent ring buffer for each feature. Please review. v2: - update mem_event_check_ring arguments, check domain rather than domain_id - check ring_full first because its value was just evaluated - check if ring buffer is initialized before calling mem_access_domctl/mem_paging_domctl

1: correct LDT checks 2: add address validity check to guest_map_l1e() 3: use {rd,wr}{fs,gs}base when available 4: check for canonical address before doing page walks Signed-off-by: Jan Beulich <jbeulich@suse.com>

...task_struct *task, unsigned long cpuid_enabled) { - if (!static_cpu_has(X86_FEATURE_CPUID_FAULT)) + if (!boot_cpu_has(X86_FEATURE_CPUID_FAULT)) return -ENODEV; if (cpuid_enabled) @@ -666,7 +666,7 @@ static int prefer_mwait_c1_over_halt(const struct cpuinfo_x86 *c) if (c->x86_vendor != X86_VENDOR_INTEL) return 0; - if (!cpu_has(c, X86_FEATURE_MWAIT) || static_cpu_has_bug(X86_BUG_MONITOR)) + if (!cpu_has(c, X86_FEATURE_MWAIT) || boot_cpu_has_bug(X86_BUG_MONITOR)) return 0; return 1; diff --git a/arch/x86/kernel/reboot.c b/arch/x86/kernel/reboot.c index 725624b6c0c0..d62ebbc5ec78 100644...

Hi Andi, Four patches: - clean up asm/bugs.h, by moving all the C code into its own C file - split identify_cpu() into boot and secondary variants, so that boot-time setup functions can be marked __init - repost of the COMPAT_VDSO patches with a bit more robustness from unknown DT_tags, and functions marked __init, since all this is boot-time only setup. Thanks, J --

Hi Andi, Four patches: - clean up asm/bugs.h, by moving all the C code into its own C file - split identify_cpu() into boot and secondary variants, so that boot-time setup functions can be marked __init - repost of the COMPAT_VDSO patches with a bit more robustness from unknown DT_tags, and functions marked __init, since all this is boot-time only setup. Thanks, J --

...FLAT_KERNEL_CS64); - /* Trampoline for SYSCALL entry from compatibility mode. */ - wrmsr(MSR_CSTAR, (unsigned long)stack, ((unsigned long)stack>>32)); - stack += write_stack_trampoline(stack, stack_bottom, FLAT_KERNEL_CS32); + switch ( boot_cpu_data.x86_vendor ) + { + case X86_VENDOR_INTEL: + /* SYSENTER entry. */ + wrmsrl(MSR_IA32_SYSENTER_ESP, (unsigned long)stack_bottom); + wrmsrl(MSR_IA32_SYSENTER_EIP, (unsigned long)sysenter_entry); + wrmsr(MSR_IA32_SYSENTER_CS, __HYPERVISOR_CS, 0); + break; + case X86_VENDOR_AMD: + /* Trampoline for...

...this week's linux-next, allyesconfig on x86_64. The method of fixing was to look for warnings where the preceding statement was a simple statement and by inspection made the subsequent break unneeded. In order of frequency these look like return and break switch (c->x86_vendor) { case X86_VENDOR_INTEL: intel_p5_mcheck_init(c); return 1; - break; goto and break default: operation = 0; /* make gcc happy */ goto fail_response; - break; break and break case COLOR_SPACE_SRGB: /* by pass */ REG_SET(OUTPUT_CSC_CONTROL, 0, OUTPUT_CSC_GRPH_MODE, 0); break; - break...

...this week's linux-next, allyesconfig on x86_64. The method of fixing was to look for warnings where the preceding statement was a simple statement and by inspection made the subsequent break unneeded. In order of frequency these look like return and break switch (c->x86_vendor) { case X86_VENDOR_INTEL: intel_p5_mcheck_init(c); return 1; - break; goto and break default: operation = 0; /* make gcc happy */ goto fail_response; - break; break and break case COLOR_SPACE_SRGB: /* by pass */ REG_SET(OUTPUT_CSC_CONTROL, 0, OUTPUT_CSC_GRPH_MODE, 0); break; - break...