similar to: Back end with special loop instructions

Hi Alex, You might find it useful to look at how lib/Target/PowerPC/PPCCTRLoops.cpp works. -Hal ----- Original Message ----- > From: "Alex Susu via llvm-dev" <llvm-dev at lists.llvm.org> > To: "llvm-dev" <llvm-dev at lists.llvm.org> > Sent: Monday, May 30, 2016 5:09:37 PM > Subject: [llvm-dev] Back end with special loop instructions > > Hello.

Hello. I come back to this thread. But I want to ask a slightly different question. Is there a way to have LLVM IR language intrinsics that are given at construction time a string that is written at assembly generation time as it is? (so, basically having placeholders of strings in LLVM that remain untouched until the end, including code generation time.) More exactly, I would

Hello. I have problems specifying vector instructions with immediate values in TableGen. I wrote the following specification (I got inspired from the MSA vector instructions for the Mips back end): class MSA_I16_FMT<bits<9> opcode>: MSAInst { bits<16> s16; let Inst{31-23} = opcode; let Inst{26-11} = s16; }

Hi Alex, On 5 December 2016 at 18:00, Alex Susu <alex.e.susu at gmail.com> wrote: > We can compile it. Note that this is the only compilable code w.r.t. > using i64 or i64imm (in the 2 lines above: "dag InOperandList", "list<dag> > Pattern"). Yeah, you actually want to use "imm": list<dag> Pattern = [(int_repeat_x_times imm:$imm)];

Hello. Could you please tell me how can I optimize with the back end (llc) the following piece of assembly code generated by llc: // NOTE: my processor accepts loops in the form of REPEAT(num_times)..END_REPEAT R0 = ... REPEAT(256) R5 = R0; // basically unnecessary reg. copy REPEAT(256) R10 = LS[R4]; R2 = LS[R5]; R4 =

Hello, I'm using bwplot to make a few plots. The plots are exactly what I need, but are coming out with a grey background and turquoise boxes and whiskers. I cannot figure out how to just get black and white to be the default. Can anyone help me with this? Thanks Kenneth E. Nussear Phone 775 784-1703 Ecology, Evolution and FAX 775 784-1369

The following is a patch I've been working on to support a "ChrootUser" option in the sshd_config file. I was looking for a way to offer sftp access and at the same time restict interactive shell access. This patch is a necessary first step (IMO). It applies clean with 'patch -l'. Also attached is a shell script that helps to build a chrooted home dir on a RedHat 7.2

Hi list, I'm trying to get R to make a graph like the one shown in this pdf, where males are white bars and females are black bars. http://www.brrc.unr.edu/~knussear/mmgraph.pdf I tried barchart, but I couldnt get the bars to share a common x axis. Do you have any suggestions? Thanks for your help Ken

I have defined the intrinsic as * def int_loop: Intrinsic<[],[llvm_i8_ty, llvm_empty_ty],[]>;* and also got the Codegen backend support in Instructioninfo.td file. Then created a .ll file to test it. The .ll file is like this *declare void @llvm.loop(i8, label)define void @fn() nounwind readnone {entry: ..... ..... call void @llvm.loop(i8 10, label %entry) ret void}* But

> On that note, I think that in general it would be useful to have some > target-independent (CodeGen) pass that would do the majority of the > work for hardware loop generation. I have thought about it, but I > won't be able to do anything in the short term. > > -Krzysztof > I think a first and useful step would be to let targets optionally have the loop induction

Hi List, Just wondering where the documentation exists for the statistics which makeup the bwplot. I'm guessing that if R is like similar products that the graph is constructed as The median is the filled circle. The box surrounding the filled circle depicts the 25th and 75th quartile. The range of values is given by the dotted lines (?whiskers?) outside of each box, and possible

On 3/29/2016 3:05 AM, Jonas Paulsson via llvm-dev wrote: > Could this be done somehow, or is it really so that all targets have to > have their own passes to do this? In the Hexagon backend we also have a separate pass that converts compare+branch loops into hardware loops. We recognize several different patterns of the controlling induction variable, including cases where the increment

Hi, Hexagon has a MIR pass for detecting loops that map onto hardware support. I think a similar approach would be viable for my target but am put off by the complexity of determining whether a given loop is legal to transform. Instead, I would like to pass the responsibility for determining legality onto the C programmer who is assumed sufficiently familiar with the architecture. I think this

Dear all, I'm working on an exploratory backend on llvm. In the instruction set I'm using I have an instruction (called DECJNZ) that decrements a register and, if the decremented value is not zero, jumps (with a relative jump) to a given offset. I've described in tablegen this instruction as follow: def DECJNZ : Instruction { let Namespace = "MyTarget"; let

On Wed, Jul 25, 2012 at 12:48 AM, Michele Scandale <michele.scandale at gmail.com> wrote: > Dear all, > > I'm working on an exploratory backend on llvm. In the instruction set I'm using > I have an instruction (called DECJNZ) that decrements a register and, if the > decremented value is not zero, jumps (with a relative jump) to a given offset. > > I've

Hi List, Just wondering if there is such a thing as repeated measures regression, and if so, can R do it? I have repeated measurements of 10 individuals over a 45 day period, and I would like to regress their daily activity time against a daily environmental temperature. If I do so using averages of activity time I find a significant negative correlation, but I worry that because I have

Hi, I am looking for a way to rewrite induction variables to use an addition of -1 whenever possible (and not otherwise unprofitable). This is needed to utilize hardware loop instructions, which are present on SystemZ (branch on count). Later in the backend, an 'add -1; compare w/ 0; jne 0'-sequence can be replaced with a brct instruction. I could not find any way in the LSR pass to

Dear R developers, I have found the following bug with readline() in R 0.63.3: if you execute the menu-function and then the readline() function, then readline() prompts "Selection:" > a <- readline() hello > a [1] "hallo" > a <- menu(c("a", "b"), title="bitte:") bitte: 1:a 2:b Selection: 2 > a <- readline() Selection:

https://bugzilla.netfilter.org/bugzilla/show_bug.cgi?id=437 Summary: restore can segfaults when restoring corrupt policy counters Product: iptables Version: unspecified Platform: All OS/Version: All Status: NEW Severity: normal Priority: P2 Component: iptables-restore

Hi all, Tripped over a documentation bug. I'm guessing the behavior I've found isn't a bug in itself as it's kind of implied by chroot (unless the /etc/passwd db is read *before* you do the chroot call), so I'm calling it a documentation bug. The Setup: System A: running rsync --daemon from xinetd, configured with a read-only share. System B: syncing a local directory